13-McBSP [Compatibility Mode]

McBSP - Clocking
• Data is shifted one bit at a time
• from the DR pin to the RSR(s) or
• from the XSR(s) to the DX pin.
• The receive clock signal (CLKR) controls bit transfers
from the DR pin to the RSR(s).
• The transmit clock signal (CLKX) controls bit transfers
from the XSR(s) to the DX pin.
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