13-McBSP [Compatibility Mode]

More documents

Recommendations

Info

McBSP – Transmit Control Register 1 (XCR1) XFRLEN1: Transmit Frame Length1(0…0x7F) Single Phase Frame: Number of Words in a frame (1…128) Dual Phase Frame: Number of Words in frame – phase 1 (1...128) XWDLEN1: Transmit Word Length1 (0…7) Single Phase Frame: Number of Bits in a Word Dual Phase Frame: Number of Bits in a Word of frame -phase 1 0 = 8 Bit 1 = 12 Bit 2 = 16 Bit 3 = 20 Bit 4 = 24 Bit 5 = 32 Bit 6 and 7: reserved 13 - 22
McBSP – Transmit Control Register 2 (XCR2) XPHASE: Transmit Phase Number 0 = Single Phase Frame 1 = Dual Phase Frame XFRLEN2: Transmit Frame Length 2 (0…0x7F) Single Phase Frame: don’t care Dual Phase Frame: Number of Words in frame – phase 2 (1...128) XWDLEN2: Transmit Word Length 2 (0…7) Single Phase Frame: don’t care Dual Phase Frame: Number of Bits in a Word of frame - phase 2 0 = 8 Bit, 1 = 12 Bit, 2 = 16 Bit, 3 = 20 Bit, 4 = 24 Bit, 5 = 32 Bit XCOMPAND: Transmit Companding Mode 0 = no companding, MSB transmitted first 1 = no companding, 8-bit-data, LSB first 2 = µ-law; 8-bit-data, MSB transmitted first 3 = A-law; 8-bit-data, MSB transmitted first XFIG: Transmit Frame Sync Ignore 1 = unexpected Frame Sync ignored XDATDLY: Transmit Data Delay 0 = 0 clock cycles delay after frame Sync 1 = 1 cycle; 2 = 2 cycles; 3 =reserved 13 - 23
Page 1 and 2: Module 13: Multichannel Buffered Se
Page 3 and 4: CPU McBSP Block Diagram Peripheral
Page 5 and 6: • Direct interface to: • T1/E1
Page 7 and 8: CLK FS D a1 a0 Bit Definition: Bit
Page 9 and 10: Compression & Expanding Data 13 -9
Page 11 and 12: McBSP - Frame Phases Single Phase F
Page 13 and 14: McBSP - Transmission Transmission p
Page 15 and 16: McBSP - Register Set McBSP Control
Page 17 and 18: McBSP - Data Register McBSP Data Re
Page 19 and 20: McBSP - Serial Port Control Registe
Page 21: McBSP - Receive Control Register 2
Page 25 and 26: McBSP - Sample Rate Generator (SRGR
Page 27 and 28: McBSP - Interrupt Enable Register (
Page 29 and 30: Stereo Audio Codec TLV320AIC23B Fun
Page 31 and 32: Stereo Audio Codec TLV320AIC23B Res
Page 33 and 34: Stereo Audio Codec TLV320AIC23B Ana
Page 35 and 36: Stereo Audio Codec TLV320AIC23B Dig
Page 37 and 38: Stereo Audio Codec TLV320AIC23B Dig
Page 39 and 40: EEPROM AT25256 Exercise: Lab13_4:
Page 41 and 42: Access Status Register: EEPROM AT25
Page 43 and 44: EEPROM AT25256 Write -Enable (WREN)
Page 45 and 46: Read (READ) Timing: EEPROM AT25256

13-McBSP [Compatibility Mode]

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?