13-McBSP [Compatibility Mode]

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Stereo Audio Codec TLV320AIC23B Left Channel Headphone Volume Control Register: LRS =Left /Right simultaneous update volume (0=OFF,1=ON) LZC =Left channel zero cross (0 =OFF,1=ON). If ON, volume updates only at zero crossings LHV = Left Headphone Volume (0x7F = +6dB; 0x79 = 0dB; 0x30 = -73dB (mute) Right Channel Headphone Volume Control Register: RLS =Right /Left simultaneous update volume (0=OFF,1=ON) RZC =Right channel zero cross (0 =OFF,1=ON). If ON, volume updates only at zero crossings RHV =Right Headphone Volume (0x7F =+6dB; 0x79 =0dB; 0x30 =-73dB (mute) <strong>13</strong> - 32
Stereo Audio Codec TLV320AIC23B AnalogueAudio Path Control Register: MICB =Microphone boost (0 =0dB; 1=20dB) MICM =Microphone mute (0 =normal; 1=muted) INSEL =Input Select forAudio (0 =line; 1=Microphone) BYP = Bypass (0 = disabled; 1 = enabled (line in to line out)) DAC =DAC select (0=DAC OFF; 1=DAC ON) STE =Added Side Tone ( 0=OFF; 1=ON) STA=Side Tone Volume (If STE =ON, MIC is routed both to headphone &line out ). <strong>13</strong> - 33
Page 1 and 2: Module 13: Multichannel Buffered Se
Page 3 and 4: CPU McBSP Block Diagram Peripheral
Page 5 and 6: • Direct interface to: • T1/E1
Page 7 and 8: CLK FS D a1 a0 Bit Definition: Bit
Page 9 and 10: Compression & Expanding Data 13 -9
Page 11 and 12: McBSP - Frame Phases Single Phase F
Page 13 and 14: McBSP - Transmission Transmission p
Page 15 and 16: McBSP - Register Set McBSP Control
Page 17 and 18: McBSP - Data Register McBSP Data Re
Page 19 and 20: McBSP - Serial Port Control Registe
Page 21 and 22: McBSP - Receive Control Register 2
Page 23 and 24: McBSP - Transmit Control Register 2
Page 25 and 26: McBSP - Sample Rate Generator (SRGR
Page 27 and 28: McBSP - Interrupt Enable Register (
Page 29 and 30: Stereo Audio Codec TLV320AIC23B Fun
Page 31: Stereo Audio Codec TLV320AIC23B Res
Page 35 and 36: Stereo Audio Codec TLV320AIC23B Dig
Page 37 and 38: Stereo Audio Codec TLV320AIC23B Dig
Page 39 and 40: EEPROM AT25256 Exercise: Lab13_4:
Page 41 and 42: Access Status Register: EEPROM AT25
Page 43 and 44: EEPROM AT25256 Write -Enable (WREN)
Page 45 and 46: Read (READ) Timing: EEPROM AT25256

13-McBSP [Compatibility Mode]

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