Chapter 15 Pulse-Width Modulation Subsystem (PWMSS).
Chapter 15 Pulse-Width Modulation Subsystem (PWMSS).
Chapter 15 Pulse-Width Modulation Subsystem (PWMSS).
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Enhanced PWM (ePWM) Module www.ti.com<br />
Table <strong>15</strong>-10. Submodule Configuration Parameters (continued)<br />
Submodule Configuration Parameter or Option<br />
Trip-zone (TZ) • Configure the ePWM module to react to one, all, or none of the trip-zone pins.<br />
• Specify the tripping action taken when a fault occurs:<br />
– Force EPWMxA and/or EPWMxB high<br />
– Force EPWMxA and/or EPWMxB low<br />
– Force EPWMxA and/or EPWMxB to a high-impedance state<br />
– Configure EPWMxA and/or EPWMxB to ignore any trip condition.<br />
• Configure how often the ePWM will react to each trip-zone pin:<br />
– One-shot<br />
– Cycle-by-cycle<br />
• Enable the trip-zone to initiate an interrupt.<br />
• Bypass the trip-zone module entirely.<br />
Event-trigger (ET) • Enable the ePWM events that will trigger an interrupt.<br />
• Specify the rate at which events cause triggers (every occurrence or every second or third<br />
occurrence)<br />
• Poll, set, or clear event flags<br />
High-Resolution PWM • Enable extended time resolution capabilities<br />
(HRPWM)<br />
• Configure finer time granularity control or edge positioning<br />
Code examples are provided in the remainder of this chapter that show how to implement various ePWM<br />
module configurations. These examples use the constant definitions shown in Example <strong>15</strong>-1.<br />
Example <strong>15</strong>-1. Constant Definitions Used in the Code Examples<br />
// TBCTL (Time-Base Control)<br />
// = = = = = = = = = = = = = = = = = = = = = = = = = =<br />
// TBCNT MODE bits<br />
#define TB_COUNT_UP 0x0<br />
#define TB_COUNT_DOWN 0x1<br />
#define TB_COUNT_UPDOWN 0x2<br />
#define TB_FREEZE 0x3<br />
// PHSEN bit<br />
#define TB_DISABLE 0x0<br />
#define TB_ENABLE 0x1<br />
// PRDLD bit<br />
#define TB_SHADOW 0x0<br />
#define TB_IMMEDIATE 0x1<br />
// SYNCOSEL bits<br />
#define TB_SYNC_IN 0x0<br />
#define TB_CTR_ZERO 0x1<br />
#define TB_CTR_CMPB 0x2<br />
#define TB_SYNC_DISABLE 0x3<br />
// HSPCLKDIV and CLKDIV bits<br />
#define TB_DIV1 0x0<br />
#define TB_DIV2 0x1<br />
#define TB_DIV4 0x2<br />
// PHSDIR bit<br />
#define TB_DOWN 0x0<br />
#define TB_UP 0x1<br />
// CMPCTL (Compare Control)<br />
// = = = = = = = = = = = = = = = = = = = = = = = = = =<br />
// LOADAMODE and LOADBMODE bits<br />
#define CC_CTR_ZERO 0x0<br />
#define CC_CTR_PRD 0x1<br />
#define CC_CTR_ZERO_PRD 0x2<br />
#define CC_LD_DISABLE 0x3<br />
1628 <strong>Pulse</strong>-<strong>Width</strong> <strong>Modulation</strong> <strong>Subsystem</strong> (<strong>PWMSS</strong>) SPRUH73E–October 2011–Revised May 2012<br />
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