Fault Diagnostic System for Cascaded H-Bridge Multilevel Inverter ...

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traction motor. The additional core losses in an induction motor due to harmonic voltage have been studied in [4-5]. Additionally, the dc utilization of a conventional inverter is quite low even with the advent of PWM techniques such as third harmonic injection and space vector PWM; the maximum of dc utilization is about 86%. The dc utilization is particularly important factor for traction drive application in order to achieve wide speed range operation. Significantly, the use of CIDs might cause motor damage and failure because some CIDs have high-voltage change rates (dv/dt), which generate a common mode voltage across the motor windings. High-frequency switching can aggravate this problem because of the frequent times this common mode voltage is impressed upon the motor each interval. The major problems reported have been motor bearing failure and motor insulation breakdown because of dielectric stresses, circulating currents, voltage surge, and corona discharge [1, 6]. Moreover, CIDs with fast switching (1 µs) at high voltage level (600 V) of power semiconductors can produce broadband electromagnetic interference (EMI). A multilevel inverter has several advantages over a conventional two-level inverter that uses high switching frequency pulse width modulation (PWM). The attractive features of a multilevel inverter can be briefly summarized as follows: • Staircase waveform quality: Multilevel inverters not only can generate the output voltages with very low distortion, but also can reduce the dv/dt stresses; therefore electromagnetic compatibility (EMC) problems can be reduced; 4
• Common-mode (CM) voltage: Multilevel inverters produce smaller CM voltage; therefore, the stress in the bearings of a motor connected to a multilevel motor drive can be reduced. Furthermore, CM voltage can be eliminated by using advanced modulation strategies such as that proposed in [7]; • Input current: Multilevel inverters can draw input current with low distortion; • Switching frequency: Multilevel inverters can operate at both fundamental switching frequency and high switching frequency PWM. It should be noted that lower switching frequency usually means lower switching loss and higher efficiency. Unfortunately, multilevel inverters do have some disadvantages. One particular disadvantage is the greater number of power semiconductor switches needed. Although lower voltage rated switches can be utilized in a multilevel inverter, each switch requires a related gate drive circuit. This may cause the overall system to be more expensive and complex. Three different major multilevel converter structures have been reported in the literature: cascaded H-bridges converter with separate dc sources (SDCS), diode clamped (neutral- clamped), and flying capacitors (capacitor clamped). Two topologies of multilevel inverters for electric drive application have been discussed in [1]. First, the cascade MLID is a general fit for large automotive all-electric drives because of the high VA rating possible and because it uses several level dc voltage sources which would be available from batteries or fuel cells. Second, the back-to-back diode-clamped converter 5
Page 1 and 2: To the Graduate Council: I am submi
Page 3 and 4: Copyright © by Surin Khomfoi All R
Page 5 and 6: ACKNOWLEDGEMENTS There are many peo
Page 7 and 8: ABSTRACT A fault diagnostic and rec
Page 9 and 10: TABLE OF CONTENTS CHAPTER PAGE 1. I
Page 11 and 12: LIST OF FIGURES FIGURE 1.1. SINGLE-
Page 13 and 14: FIGURE 5.21. SIMULATION RESULTS OF
Page 15 and 16: 1. INTRODUCTION 1.1 Background In r
Page 17: Multilevel inverters provide more p
Page 21 and 22: Advantages: • The number of possi
Page 23 and 24: VCA C C5 C4 C3 C2 120 o C1 A A5 A4
Page 25 and 26: times the level of an unbalanced vo
Page 27 and 28: then, if the probability of a singl
Page 29 and 30: It is possible that AI-based techni
Page 31 and 32: Va n v a2 v a1 A + S A - S B- S A +
Page 33 and 34: 2. SURVEY OF PREVIOUS WORKS 2.1 Int
Page 35 and 36: vehicle. It would be better if one
Page 37 and 38: Several research papers on fault de
Page 39 and 40: technology would reduce the impleme
Page 41 and 42: The vector in the d-q frame can als
Page 43 and 44: iβ iβ iβ Fault @ S 1 iα phase a
Page 45 and 46: As can be seen in Figure 2.5, the t
Page 47 and 48: Current beta (A) Current beta (A) 1
Page 49 and 50: 2.3.2 Control signal observer appro
Page 51 and 52: Current phase A (A) 25 20 15 10 5 0
Page 53 and 54: As can be seen, two binary bits are
Page 55 and 56: As illustrated in Table 2.4, most d
Page 57 and 58: system or training a neural network
Page 59 and 60: Murphy [33] presented a fault diagn
Page 61 and 62: Vdc Vdc Current (A) n 15 10 5 0 -5
Page 63 and 64: 2.4.3 Cascaded H-bridges MLID Fault
Page 65 and 66: 2.5 A promising support for AI-base
Page 67 and 68: waveforms. It is evident that the u
Page 69 and 70:
Figure 2.16 (b) shows an example of
Page 71 and 72:
technique methodology of fault diag
Page 73 and 74:
3.2 Structure of fault diagnostic s
Page 75 and 76:
The modulation index (ma) is the ra
Page 77 and 78:
The simulation model is illustrated
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Normal Fault A+ Fault A- Fault B+ F
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(a) (c) Figure 3.8. Experiment of o
Page 83 and 84:
3.4 Feature extraction system Simul
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Normal Fault A+ Fault A- Fault B+ F
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X1 X2 X3 X4 X5 Xn Data PCA Scores t
Page 89 and 90:
Selecting a reduced subset (PCs kep
Page 91 and 92:
The collected data from both simula
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Score PC1 Score PC1 -2 -4 -6 4 6 4
Page 95 and 96:
population created from multiple in
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• Encoded input PCs: the PCs to b
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andomly selects a crossover point w
Page 101 and 102:
Loadings on PC#13 Scores on PC#13 L
Page 103 and 104:
3.6 Neural network classification A
Page 105 and 106:
As a comparison among transformatio
Page 107 and 108:
Reselect training set Table 3.2. Ta
Page 109 and 110:
[42], is used to simulate the targe
Page 111 and 112:
The second category of testing resu
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4. RECONFIGURATION TECHNIQUE 4.1 In
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4.3 Reconfiguration method The reco
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Amplitude (pu.) 1 0.8 0.6 0.4 0.2 0
Page 119 and 120:
traction motor only at half load co
Page 121 and 122:
% Relative to fundamental component
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Van Vbn Vcn Vab Vbc Vca 100 0 -100
Page 125 and 126:
4.5 Summary The reconfiguration tec
Page 127 and 128:
5.2 Fault Diagnostic technique for
Page 129 and 130:
will be trained with short circuit
Page 131 and 132:
5.2.3 Principal component selection
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5.3 Simulation validation Several S
Page 135 and 136:
The principal component analysis (P
Page 137 and 138:
1 p{1} a{1} Input 1 p{1} Subsystem
Page 139 and 140:
INV_A INV_B INV_C Showing the sub-s
Page 141 and 142:
Fault creating circuit RT-LAB comma
Page 143 and 144:
Figure 5.13. Obviously, the loss of
Page 145 and 146:
For the short circuit validation, t
Page 147 and 148:
Starting current Fault start (a) Fa
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As can be seen, the simulation and
Page 151 and 152:
Loss of gate drive signal fault Rea
Page 153 and 154:
Starting current Fault start Fault
Page 155 and 156:
Fault start Fault clear Fault start
Page 157 and 158:
Table 5.3. Performance investigatio
Page 159 and 160:
5mV/1A (2A/Div) Real open circuit f
Page 161 and 162:
The Opal-RT system needs a few cycl
Page 163 and 164:
6. CONCLUSIONS AND RECOMMENDATIONS
Page 165 and 166:
their locations. Also, a genetic al
Page 167 and 168:
6.2 Contributions This dissertation
Page 169 and 170:
technique for tracking the current
Page 171 and 172:
• S. Khomfoi, L. M. Tolbert, “A
Page 173 and 174:
Chapter 1 [1] L. M. Tolbert, F. Z.
Page 175 and 176:
Characteristics,” IEEE Transactio
Page 177 and 178:
[28] S. Nandi, H. A. Toliyat, X. Li
Page 179 and 180:
[43] D. Zhang, H. Li, “A Low Cost
Page 181 and 182:
[58] J. Fieres, A. Grubl, S. Philip
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Fault Diagnostic System for Cascaded H-Bridge Multilevel Inverter ...

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