Analog Circuit Design Laboratory Report - MyWeb at WIT ...
Analog Circuit Design Laboratory Report - MyWeb at WIT ...
Analog Circuit Design Laboratory Report - MyWeb at WIT ...
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The ideal op-amp generally has 5 terminals, two input terminals (pins 2 and 3),<br />
one output terminal (pin 6), and two power supply terminals (pins 7 and 4), see Figure 1.<br />
Pin 2 is the inverting input terminal while pin 3 is the non-inverting input terminal. The<br />
power supply terminals are typically connected to a positive voltage, VCC= 15V and to a<br />
neg<strong>at</strong>ive voltage, VEE= -15V, pins 7 and 4 respectively. The characteristics of an ideal<br />
op-amp are th<strong>at</strong> it has an infinite open-loop gain (AOL), an infinite bandwidth (Bwl),<br />
infinite input impedance (Rin), zero output impedance (RO) and zero common-mode gain<br />
(ACM).<br />
When oper<strong>at</strong>ing in its simplest form, displayed in Figure 1, with RL equal to 10-<br />
kΩ (typ), the voltage output of the op-amp is equivalent to the positive or neg<strong>at</strong>ive<br />
s<strong>at</strong>ur<strong>at</strong>ion voltage. The s<strong>at</strong>ur<strong>at</strong>ion voltage (Vs<strong>at</strong>) can be calcul<strong>at</strong>ed by:<br />
+ s<strong>at</strong> = CC −1<br />
V V or 1 + = s<strong>at</strong> EE V V Eq. (1)<br />
The supply current (Isupply), <strong>at</strong> pins 7 and 4 is determined by the supply manufacturer’s<br />
specific<strong>at</strong>ion and ranges from a few milliamps for older products to mega-amps for<br />
today’s new technology. Using Kirkoff’s current law Isupply(+) is equal to Isupply(-) plus the<br />
output current of the op-amp read c′-c, see Figure 1.<br />
I +<br />
sup ply = I ply − I<br />
( + ) sup ( ) o<br />
Eq. (2)<br />
3