MNEMEE - Electronic Systems - Technische Universiteit Eindhoven

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Table 1 – Worst-case resource requirements for an H.263 encoder running on an ARM7. Actor Execution time [cycles] Stack size [bytes] Motion Est. 382419 316352 Motion Comp. 11356 2796 MB Enc. 8409 2216 MB Dec. 6264 864 VLC 26018 1356 Edge Token size [bytes] VLC self-edge 1024 Motion Comp. self-edge 38016 Motion Comp. to Motion Est. 38016 Others 384 7.2.3. SDF graph-based multi-processor design-flow The design of new consumer electronics devices is getting more and more complex as more functionality is integrated into these devices. To manage the design complexity, a predictable design flow is needed. The result should be a system that guarantees that an application can perform its own tasks within strict timing deadlines, independent of other applications running on the system. This requires that the timing behaviour of the hardware, the software, as well as their interaction can be predicted. A predictable design-flow that meets these requirements has been presented in [44]. It maps a time-constrained streaming application, modelled as an SDFG, onto a Network-on-Chip-based MP- SoC (NoC-based MP-SoC). The objective is to minimize the resource usage (processing, memory, communication bandwidth) while offering guarantees on the throughput of the application when mapped to the system. The design flow presented in [44] is also shown in Figure 5. The design flow consists of thirteen steps which are divided over four phases. This section introduces the various phases in the flow. The details of the individual steps and the motivation for the ordering of the steps in the flow can be found in [44]. The design flow takes as input an application that is modelled with an SDFG with accompanying throughput constraint. A technique to characterize an application with an SDFG has been discussed in Section 7.2.2. This SDFG specifies for every actor the required memory space and execution time for all processors on which this actor can be executed. It also gives the size of the tokens communicated over the edges. The resources in the NoC-based MP-SoC are described with a platform graph and an interconnect graph. The result of the design flow is an MP-SoC configuration which specifies a binding of the actors to the processors and memories, a schedule for the actors on the processors and a schedule for the token communication over the NoC. Tokens that are communicated over the edges of an application SDFG must be stored in memory. The allocation of storage space for these tokens is dealt with in the memory dimensioning phase. This involves the placement of tokens into memories that are outside the tile that execute the actor that uses these tokens. Furthermore, storage space must be assigned to the channels of the SDFG. Since the assignment of the storage space impacts the throughput of the application, an analysis is made of this trade-off space. Based on this analysis, a distribution of storage space over the channels is selected. All design decisions that are made in this phase of the design flow are modelled into the SDFG. The resulting SDFG is called a memory-aware SDFG. Public Page 16 of 87
Figure 5 - SDFG-based MP-SoC design flow [44]. The next phase of the design flow, called constraint refinement, computed latency and bandwidth constraints on the channels of the SDFG. These constraints are used to steer the mapping of the SDFG Public Page 17 of 87
Page 1 and 2: Information Societies Technology (I
Page 3 and 4: 9.5. METRICS AND COST FACTORS FOR D
Page 5 and 6: Public Page 5 of 87
Page 7 and 8: 4. Preface The main objectives of t
Page 9 and 10: 6. Introduction Multimedia applicat
Page 11 and 12: Figure 2 - Preliminary MNEMEE sourc
Page 13 and 14: modelled with an FSM-based SADF, on
Page 15: analyzing the basic operations of t
Page 19 and 20: Figure 6 - H.263 encoder mapped ont
Page 21 and 22: transitions reflect possible next s
Page 23 and 24: parameters is modified, the applica
Page 25 and 26: There is however one problem with u
Page 27 and 28: 7.6. FSM-based SADF-based multi-pro
Page 29 and 30: 8. Statically allocated data storag
Page 31 and 32: Embedded systems differ from genera
Page 33 and 34: Plasma), etc., is enabled by compre
Page 35 and 36: One of the most important developme
Page 37 and 38: The Atomium/Analysis version includ
Page 39 and 40: 8.4.3. Profiling steps Profiling th
Page 41 and 42: Array size [bytes] Number of access
Page 43 and 44: For multimedia application this is
Page 45 and 46: Figure 22 - Data re-use at differen
Page 47 and 48: Figure 24 - (Pruned) re-use graph o
Page 49 and 50: Figure 25 - (Pruned) re-use graph o
Page 51 and 52: has to be refreshed completely, bec
Page 53 and 54: Figure 27 - Assignment of copies (c
Page 55 and 56: information about the platform, esp
Page 57 and 58: 9. Dynamically allocated data stora
Page 59 and 60: combination of DDT implementations.
Page 61 and 62: manager does not know beforehand wh
Page 63 and 64: locked remains allocated and the DM
Page 65 and 66: Improving the performance of the DM
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The problem with the aforementioned
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1. Problem 1: Increased complexity
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Table 3 - Comparison of different p
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Table 4 - Profiling information sto
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Figure 40 - Maximum number of objec
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Figure 43 - Utilization of the allo
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10. Conclusions Future multimedia a
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[17] Ang, S., Constantinides, G., L
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[34] MPEG-2. Generic coding of movi
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[65] SGI. Standard template library
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12. Glossary ANL Atomium analysis D
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