MNEMEE - Electronic Systems - Technische Universiteit Eindhoven

List of Tables
Table 1 – Worst-case resource requirements for an H.263 encoder running on an ARM7. ..................16
Table 2 - Platform summary...................................................................................................................55
Table 3 - Comparison of different profiling approaches. .......................................................................71
Table 4 - Profiling information stored by our tools. ...............................................................................73
Table 5 - Memory blocks requested by the application. ........................................................................77
List of Figures
Figure 1 – An interactive 3D game with streaming video based mode [25]. ...........................................9
Figure 2 – Preliminary MNEMEE source-to-source optimizations design flow. ..................................11
Figure 3 – System scenario methodology overview [29]. ......................................................................14
Figure 4 – SDFG of an H.263 encoder. ..................................................................................................14
Figure 5 - SDFG-based MP-SoC design flow [44]. ...............................................................................17
Figure 6 – H.263 encoder mapped onto MP-SoC platform. ..................................................................19
Figure 7 – FSM-based SADF graph of an H.263 decoder. ....................................................................20
Figure 8 – Scenario identification technique. .........................................................................................22
Figure 9 – Extraction of FSM-based SADF from scenario identification technique. ............................26
Figure 10 – Scenario-aware MP-SoC design flow. ................................................................................27
Figure 11 - Power Analysis of a MP-SoC system. .................................................................................30
Figure 12 - Memory hierarchy in embedded systems. ...........................................................................30
Figure 13 - Area and Performance benefits of SPM over cache for embedded benchmarks [15]. ........31
Figure 14 - 4:2:0 macroblock structure. .................................................................................................33
Figure 15 - Video encoder block diagram [18]. .....................................................................................34
Figure 16 - MPEG-4 part 2 SP encoder scheme. ...................................................................................35
Figure 17 - Profiling Steps for Analysis. ................................................................................................39
Figure 18 - Execution time usage by functions (micro seconds). ..........................................................40
Figure 19 - Array size and accesses for selected functionalities. ...........................................................41
Figure 20 - Exploiting the memory hierarchy. .......................................................................................43
Figure 21 - Work flow overview. ...........................................................................................................44
Figure 22 - Data re-use at different loop-levels. ....................................................................................45
Figure 23 - Example re-use graph. .........................................................................................................46
Figure 24 - (Pruned) re-use graph of the motion-vector array. ..............................................................47
Figure 25 - (Pruned) re-use graph of the reconstructed Y-frame demonstrating the results of the XOR
re-use identification algorithm. .......................................................................................................49
Figure 26 - (Pruned) re-use graph of the reconstructed Y-frame for the MPEG-4 motion-estimation
function demonstrating loop-carried copy candidates. ...................................................................50
Figure 27 - Assignment of copies (cf. Figure 23) to memory layers. ....................................................53
Figure 28 - Possible (partial) selection of copies of the reconstructed Y-frame. ...................................54
Figure 29 - Example of pre-fetching. .....................................................................................................54
Figure 30 - A singly linked list (SLL) ....................................................................................................59
Figure 31 - A doubly linked list (DLL) ..................................................................................................59
Figure 32 - A singly linked list with a roving pointer storing the last accessed element. ......................60
Figure 33 - Static memory management solutions fit for static data storage needs and dynamic
memory management solutions fit for dynamic data storage needs. ..............................................61
Figure 34 - Internal (A) and external (B) memory fragmentation..........................................................63
Figure 35 - Software metadata required for behavioural analysis of DDTs. ..........................................68
Figure 36 - Methodological Flow for Profiling Dynamic Applications. ................................................71
Figure 37 - Flow of profiling and analysis tools. ...................................................................................72
Figure 38 - Total data accesses for each DDT. ......................................................................................73
Figure 39 - Maximum Instances for each DDT. ....................................................................................74
Figure 40 - Maximum number of objects hosted in each DDT. .............................................................75
Figure 41 - Iterator access versus operator[] access to elements in a DDT. ..........................................75
Figure 42: Sequential/Random access pattern for each DDT ................................................................76
Figure 43 - Utilization of the allocated memory space by the DDT. .....................................................77
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