MC68HC908JW32, MC68HC908JW32 - Data Sheet - Freescale

More documents

Recommendations

Info

MC68HC908JW32 Data Sheet To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://www.freescale.com Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. This product incorporates SuperFlash® technology licensed from SST. © Freescale Semiconductor, Inc., 2005, 2006, 2009. All rights reserved. MC68HC908JW32 Data Sheet, Rev. 6 Freescale Semiconductor 3
Page 1: MC68HC908JW32 Data Sheet M68HC08 Mi
Page 5 and 6: List of Chapters Chapter 1 General
Page 7 and 8: Table of Contents List of Chapters
Page 9 and 10: 5.4.6 CGM VCO Clock Output (CGMVCLK
Page 11 and 12: 8.7 TIM During Break Interrupts. .
Page 13 and 14: 13.2.1 Port A Data Register . . . .
Page 15 and 16: 18.4 Low-Power Modes . . . . . . .
Page 17 and 18: Chapter 1 General Description 1.1 I
Page 19 and 20: 1.4 Pin Assignments PTA0/KBA0 PTC1/
Page 21 and 22: 1.6 Power Management Figure 1-5 sho
Page 23 and 24: 1.7.5 External Reset Pin (RST) MC68
Page 25 and 26: Chapter 2 Memory 2.1 Introduction T
Page 27 and 28: MC68HC908JW32 Data Sheet, Rev. 6 Mo
Page 29 and 30: $001A Port Option Control Register
Page 31 and 32: $0051 $0052 $0053 USB Control Regis
Page 33 and 34: MC68HC908JW32 Data Sheet, Rev. 6 Mo
Page 35 and 36: 2.4 Random-Access Memory (RAM) MC68
Page 37 and 38: 7. Wait for a time, tnvh (5 µs). 8
Page 39 and 40: Algorithm for programming a row (64
Page 41 and 42: Chapter 3 Configuration Registers (
Page 43 and 44: MC68HC908JW32 Data Sheet, Rev. 6 Co
Page 45 and 46: Chapter 4 Central Processor Unit (C
Page 47 and 48: 4.3.3 Stack Pointer MC68HC908JW32 D
Page 49 and 50: MC68HC908JW32 Data Sheet, Rev. 6 Ar
Page 51 and 52: BHS rel Source Form Branch if Highe
Page 53 and 54:
Source Form JMP opr JMP opr JMP opr
Page 55 and 56:
Source Form SWI Software Interrupt
Page 57 and 58:
Chapter 5 Clock Generator Module (C
Page 59 and 60:
5.3.1 Oscillator Module MC68HC908JW
Page 61 and 62:
5.3.4 Acquisition and Tracking Mode
Page 63 and 64:
3. Calculate N: 4. Calculate and ve
Page 65 and 66:
5.3.9 CGM External Connections MC68
Page 67 and 68:
5.5 CGM Registers MC68HC908JW32 Dat
Page 69 and 70:
5.5.2 PLL Bandwidth Control Registe
Page 71 and 72:
MC68HC908JW32 Data Sheet, Rev. 6 In
Page 73 and 74:
5.8 Acquisition/Lock Time Specifica
Page 75 and 76:
Chapter 6 System Integration Module
Page 77 and 78:
$FE04 $FE05 $FE06 Interrupt Status
Page 79 and 80:
CGMXCLK RST IAB PC VECT H VECT L 6.
Page 81 and 82:
MC68HC908JW32 Data Sheet, Rev. 6 SI
Page 83 and 84:
MC68HC908JW32 Data Sheet, Rev. 6 Ex
Page 85 and 86:
6.5.2.1 Interrupt Status Register 1
Page 87 and 88:
6.5.3 Reset All reset sources alway
Page 89 and 90:
6.6.2 Stop Mode MC68HC908JW32 Data
Page 91 and 92:
PIN — External Reset Bit 1 = Last
Page 93 and 94:
Chapter 7 Monitor Mode (MON) 7.1 In
Page 95 and 96:
7.3.1 Entering Monitor Mode MC68HC9
Page 97 and 98:
7.3.4 Baud Rate MC68HC908JW32 Data
Page 99 and 100:
Table 7-5. WRITE (Write Memory) Com
Page 101 and 102:
MC68HC908JW32 Data Sheet, Rev. 6 Se
Page 103 and 104:
7.5 ROM-Resident Routines MC68HC908
Page 105 and 106:
ORG RAM : FILE_PTR: BUS_SPD DS.B 1
Page 107 and 108:
Chapter 8 Timer Interface Module (T
Page 109 and 110:
8.4.1 TIM Counter Prescaler MC68HC9
Page 111 and 112:
8.4.4 Pulse Width Modulation (PWM)
Page 113 and 114:
MC68HC908JW32 Data Sheet, Rev. 6 In
Page 115 and 116:
These I/O registers control and mon
Page 117 and 118:
Address: $000D Bit 7 6 5 4 3 2 1 Bi
Page 119 and 120:
MC68HC908JW32 Data Sheet, Rev. 6 I/
Page 121 and 122:
Address: $0014 Read: Write: Bit 7 6
Page 123 and 124:
Chapter 9 Timebase Module (TBM) 9.1
Page 125 and 126:
TBR2-TBR0 — Timebase Rate Selecti
Page 127 and 128:
Chapter 10 Serial Peripheral Interf
Page 129 and 130:
CGMOUT ÷ 2 FROM SIM CLOCK DIVIDER
Page 131 and 132:
10.5.2 Transmission Format When CPH
Page 133 and 134:
BUS CLOCK MOSI SPSCK CPHA = 1 SPSCK
Page 135 and 136:
10.7.1 Overflow Error MC68HC908JW32
Page 137 and 138:
NOTE To prevent bus contention with
Page 139 and 140:
10.9 Resetting the SPI MC68HC908JW3
Page 141 and 142:
Page 143 and 144:
Page 145 and 146:
Page 147 and 148:
Chapter 11 USB 2.0 FS Module 11.1 I
Page 149 and 150:
11.3.2 USB Control Logic The USB co
Page 151 and 152:
MC68HC908JW32 Data Sheet, Rev. 6 US
Page 153 and 154:
11.5 USB Module Registers MC68HC908
Page 155 and 156:
11.5.1 USB Control Register (USBCR)
Page 157 and 158:
Page 159 and 160:
Page 161 and 162:
11.5.6 USB Endpoint 1-4 Data Size R
Page 163 and 164:
Chapter 12 PS2 Clock Generator (PS2
Page 165 and 166:
MC68HC908JW32 Data Sheet, Rev. 6 PS
Page 167 and 168:
Chapter 13 Input/Output (I/O) Ports
Page 169 and 170:
Port Bit DDR B C D Table 13-1. Port
Page 171 and 172:
13.2.2 Data Direction Register A MC
Page 173 and 174:
Address: $0005 Bit 7 6 5 4 3 2 1 Bi
Page 175 and 176:
13.4.2 Data Direction Register C MC
Page 177 and 178:
Figure 13-13 shows the port D I/O c
Page 179 and 180:
Table 13-7 shows the priority table
Page 181 and 182:
Figure 13-16 shows the port E I/O c
Page 183 and 184:
MC68HC908JW32 Data Sheet, Rev. 6 Po
Page 185 and 186:
Chapter 14 External Interrupt (IRQ)
Page 187 and 188:
14.4 IRQ Pin MC68HC908JW32 Data She
Page 189 and 190:
MC68HC908JW32 Data Sheet, Rev. 6 IR
Page 191 and 192:
Chapter 15 Keyboard Interrupt Modul
Page 193 and 194:
MC68HC908JW32 Data Sheet, Rev. 6 Fu
Page 195 and 196:
15.5.2 Keyboard Interrupt Enable Re
Page 197 and 198:
Chapter 16 Computer Operating Prope
Page 199 and 200:
16.3.6 Reset Vector Fetch MC68HC908
Page 201 and 202:
Chapter 17 Low-Voltage Inhibit (LVI
Page 203 and 204:
17.4 LVI Status Register The LVI st
Page 205 and 206:
Chapter 18 Break Module (BRK) 18.1
Page 207 and 208:
MC68HC908JW32 Data Sheet, Rev. 6 Lo
Page 209 and 210:
SBSW — Break Wait Bit MC68HC908JW
Page 211 and 212:
Chapter 19 Electrical Specification
Page 213 and 214:
19.5 DC Electrical Characteristics
Page 215 and 216:
19.8 Crystal Oscillator Characteris
Page 217 and 218:
19.13 5.0V SPI Characteristics Diag
Page 219 and 220:
SS INPUT SPSCK INPUT CPOL = 0 SPSCK
Page 221:
Chapter 20 Ordering Information and
show all

MC68HC908JW32, MC68HC908JW32 - Data Sheet - Freescale

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?