Predictive Control of Three Phase AC/DC Converters

WARSAW UNIVERSITY
OF TECHNOLOGY
Faculty of Electrical Engineering
Ph.D. THESIS
Patrycjusz Antoniewicz M.Sc.
Predictive Control of Three Phase AC/DC Converters
Supervisor
Professor Marian P. Kazmierkowski, Ph.D., D.Sc.
Warsaw, 2009

Abstract
The dissertation proposes several Predictive Direct Power Control methods
for two level AC/DC converters. Different versions of predictive methods
have been presented, with variable and constant switching frequency as
well. Both approaches guarantee high dynamic in transient states and low
T HD factor of line currents. Proposed methods have been compared with
well known methods: Switching Table based Direct Power Control – ST-
DPC and Direct Power Control with Space Vector Modulator – DPC-SVM.
Several simulation and experimental results show that the predictive control
methods improve transient response and reduce higher harmonics distortion,
even for low switching frequency. Moreover, due to virtual flux approach it
is possible to work without line voltage sensor, even under distorted and unbalanced
voltages.
Streszczenie
W pracy przedstawiono kilka metod predykcyjnego bezpośredniego sterowania
mocą (ang. Predictive Direct Power Control – P-DPC) dla dwupoziomowych
przekształtników AC/DC. Metody predykcyjne zostały podzielone
na dwie grupy, pracujące ze zmienną i stałą częstotliwością łączeń.
Oba rozwiązania charakteryzują się bardzo dobrymi właściwościami dynamicznymi
i niskim współczynnikiem T HD prądów sieciowych. Przedstawione
metody zostały porównane z klasycznymi rozwiązaniami: bezpośrednim
sterowaniem mocą z tablicą przełączęń (ang. Switching Table based
Direct Power Control – ST-DPC) i bezpośrednim sterowaniem mocą z modulatorem
wektorowym (ang. Direct Power Control with Space Vector Modulator
– DPC-SVM). Na podstawie szeregu badań symulacyjnych i laboratoryjnych
stwierdzono, że metody predykcyjne osiągają lepsze wyniki
w stanach przejściowych oraz niższe współczynniki zawartości wyższych harmonicznych,
nawet w przypadku pracy z niskimi częstotliwościami łączeń.
Dodatkowo, dzięki zastosowaniu koncepcji wirtualnego strumienia, możliwa
jest praca bez czujników pomiaru napięcia fazowego, nawet w warunkach
zniekształconego i niezrównoważonego napięcia.

Contents
Contents
i
1 Introduction 1
2 Voltage Source Converter 7
2.1 Space Vector Based Description of VSC . . . . . . . . . . . . . . . 8
2.2 Mathematical Model of VSC . . . . . . . . . . . . . . . . . . . . . 8
2.2.1 VSC Model in Natural Coordinates . . . . . . . . . . . . . . 11
2.2.2 VSC Model in Stationary Coordinates . . . . . . . . . . . . 13
2.2.3 VSC Model in Rotating Coordinates . . . . . . . . . . . . . 14
2.3 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Control Strategies for VSC 17
3.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2 Voltage Oriented Control . . . . . . . . . . . . . . . . . . . . . . . 17
3.3 Switching Table based Direct Power Control . . . . . . . . . . . . . 21
3.4 Direct Power Control with Space Vector Modulator . . . . . . . . . 25
3.5 Virtual Flux Based Control . . . . . . . . . . . . . . . . . . . . . . 28
3.6 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.6.1 Steady State Operation . . . . . . . . . . . . . . . . . . . . 32
3.6.2 Transient Operation . . . . . . . . . . . . . . . . . . . . . . 36
3.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
4 Predictive Direct Power Control 41
4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.2 Principles of Model Based Predictive Control . . . . . . . . . . . . 41
4.3 Variable Switching Frequency Predictive Direct Power Control . . 42
4.4 Current Harmonics Spectrum Control . . . . . . . . . . . . . . . . 46
4.5 Predictive Direct Power Control with Reduced Switching Frequency 49
4.6 Constant Switching Frequency Predictive Direct Power Control . . 50
i

ii
CONTENTS
4.6.1 Predictive Model of the Instantaneous Power Behavior . . . 50
4.6.2 Voltage Vectors Sequence . . . . . . . . . . . . . . . . . . . 52
4.6.3 Voltage Vector Selection . . . . . . . . . . . . . . . . . . . . 53
4.6.4 Voltage Vectors Application Times . . . . . . . . . . . . . . 54
4.6.5 Control Scheme of CSF-P-DPC . . . . . . . . . . . . . . . . 57
4.7 VF Based CSF - Predictive Direct Power Control . . . . . . . . . . 58
4.7.1 VF Based Predictive Model of the Instantaneous Power . . 58
4.7.2 Voltage Vector Selection . . . . . . . . . . . . . . . . . . . . 59
4.7.3 Control Scheme of VF-CSF-P-DPC . . . . . . . . . . . . . . 59
4.8 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.8.1 Steady State Operation . . . . . . . . . . . . . . . . . . . . 62
4.8.2 Transient Operation . . . . . . . . . . . . . . . . . . . . . . 67
4.9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5 Investigations of Control Methods Performance 77
5.1 Robustness to Parameters Mismatch . . . . . . . . . . . . . . . . . 77
5.1.1 Filter‘s Inductance Variations . . . . . . . . . . . . . . . . . 77
5.1.2 Filter‘s Resistance Variations . . . . . . . . . . . . . . . . . 79
5.2 On-line Choke Inductance Estimator . . . . . . . . . . . . . . . . . 80
5.3 Experimental Verification of On-line Choke Inductance Estimator . 82
5.4 Line Voltage Disturbances . . . . . . . . . . . . . . . . . . . . . . . 83
5.4.1 Influence of Line Voltage Harmonics . . . . . . . . . . . . . 83
5.4.2 Influence of Line Voltage Sags . . . . . . . . . . . . . . . . . 86
6 Experimental Study 89
6.1 Steady State Operation . . . . . . . . . . . . . . . . . . . . . . . . 89
6.2 Transient Operation . . . . . . . . . . . . . . . . . . . . . . . . . . 94
6.3 Operation with Low Switching Frequency . . . . . . . . . . . . . . 101
6.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
7 Summary and Final Conclusions 109
Bibliography 111
A Coordinate transformations 121
A.1 Stationary system . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
A.2 Rotating system . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
B Predictive Current Control 125
B.1 Predictive Current Control in stationary system . . . . . . . . . . . 125
B.2 Predictive Current Control in rotating system . . . . . . . . . . . . 127
C Predictive Direct Power Control 131

CONTENTS
iii
List of Symbols and Abbreviations 135
List of Figures 139
List of Tables 142
Index 145

Acknowledgements
The research work presented in this thesis has been carried out during my Ph.D.
study at the Institute of Control and Industrial Electronics, Warsaw University
of Technology in the period 2004-2008. Some part of the work was performed in
cooperation with the Technical University of Federico Santa Maria, Valparaiso,
Chile (Prof. Jose Rodriguez and Dr Patricio Cortes) during my stay in Chile
(October 2006) and visits of Prof. Jose Rodriguez (September 2005 and November
2006) as well as Dr Patricio Cortes (March 2007) at the Institute of Control
and Industrial Electronics. Also, part of the work has been financially supported
by the European Union FP6 (contract no. 019983 Wave Dragon MW).
First of all, I would like to thank Prof. Marian P. Kaźmierkowski for support
and help. His precious advice and numerous discussions enhanced my knowledge
and scientific inspiration.
I am grateful to Prof. Teresa Orłowska-Kowalska from the Wrocław University
of Technology and Prof. Lech M. Grzesiak from the Warsaw University of
Technology for their interest in this work and holding the post of referee.
Furthermore, I thank my colleagues from the Intelligent Control Group in
Power Electronics for their support and friendly atmosphere. Especially, to
Dr Marek Jasiński, Dr Mariusz Malinowski, Wojciech Kołomyjski and Sebastian
Styński.
Finally, I would like to thank to my whole family for patience and faith over
the years.
v

Chapter 1
Introduction
AC/DC Voltage Source Converters (VSC) are widely used in industrial AC
drives as Active Front End (AFE), DC-power supply, power quality improvement
and harmonic compensation (active filter) equipments [1], [2], [3]. Lately,
the AC/DC converters become very important part of an AC/DC/AC line interfacing
converters in renewable and distorted energy systems. This popularity,
VSC owes due to following main features:
• bi-directional power flow,
• nearly sinusoidal input current,
• high input power factor including unity power factor operation,
• low harmonic distortion of line current (THD 5%),
• adjustment and stabilization of the DC-link voltage,
• reduced size of line inductor,
• operation under line voltage distortion (harmonics, sags, notching, etc.).
Several control methods have been developed for VSC [1], [4]. Appropriate
control can provide VSC performance improvements and reduction of losses
and passive components. The basic control methods can be divided as follow
(Fig. 1.1):
• Voltage Oriented Control (VOC) [5],
• Direct Power Control (DPC) [6],
• Direct Power Control with Space Vector Modulation (DPC-SVM) [7].
1

2 CHAPTER 1. INTRODUCTION
Vector Based
Controllers
Scalar Based
Controllers
VOC DPC DPC-SVM
Predictive
Control
VFOC
VF-DPC
VF-DPC-SVM
Figure 1.1: Predictive control implementation in conjunction with main control
methods used for VSC
Most popular control method is VOC [1], [2], [3], [4], [5], [8]. It gives high
dynamic and static performance via internal current control loops. All equations
are transformed into new, rotating synchronously with line voltage space vector
coordinates, which allows to fully use advantages of linear PI controllers. To improve
robustness on line voltage distortions, a Virtual Flux (VF) [9], [10] was
introduced.
Another method, which was adopted from induction motor controls is DPC
(Direct Power Control) [1], [6], [9], [11]. This control does not use any coordinate
transformations, because it operates directly on instantaneous active and reactive
powers. High dynamic is guaranteed by hysteresis controllers and look-up table.
However, high sampling frequency requirement and variable switching frequency
are the main drawbacks of the look-up table based DPC method.
Therefore, to overcome that disadvantages, a Space Vector Modulator (SVM)
was introduced to DPC structure, giving new method called Direct Power Control
with Space Vector Modulator [12], [13]. DPC-SVM joins important advantages
of SVM [14] (e.g. constant switching frequency, unipolar voltage switchings, low
current distortions) with DPC features (e.g. simple and robust structure, lack of
internal current control loops, good dynamics, etc.). However, in spite of mentioned
advantages DPC-SVM dynamic still depends on the quality of the applied
PI controller design algorithms. Table 1.1 presents main features of described
AC voltage sensorless control methods.
Another group of VSC controls is predictive control. It is very wide class
of controllers, that have been adopted for power electronics. The main characteristic
of predictive control is use of model of the system for the prediction of
the controlled variables. Next, predefined optimization criterion selects appropriate
control set. The proposed classification for different control methods is
shown in Fig. 1.2.

Based Trajectory Based Deadbeat Control Hysteresis
Predictive Control (MPC) Model
3
Feature VOC DPC DPC-SVM
VFOC VF-DPC VF-DPC-SVM
Switching Constant Variable Constant
frequency
SVM blocks Yes No Yes
Coord. trans. Yes (two) No Yes (one)
Direct control of: Line currents Line powers Line powers
Estimation of: Virtual Flux Virtual Flux Virtual Flux
and Powers and Powers
Current ripple Low High Low
Sampling Low High Low
frequency
Line voltage Yes Yes Yes
sensorless
Table 1.1: Comparison of classical AC voltage sensorless control methods
Predictive
Control
with control MPC finite
Figure 1.2: Classification of predictive control methods used in power electronics
set control with set continous MPC
Hysteresis based predictive control tries to keep controlled variables between
hysteresis bands. Using predictive current control, switching instants can be
determined by error boundaries. When referenced vector touches the controller
band then prediction and optimization of next switching state occurs [15].
The principle of trajectory based predictive control is to force the system’s
variables onto precalculated trajectories. For example direct self control [16],
direct mean torque control [17], direct torque control [18] may be included to this
category.
A well known type of predictive controller is the deadbeat controller. It uses
the model of the system to calculate reference voltage vector, in order to set the
controlled variable error to zero within one sampling time. Next, the referenced
voltage vector is realized by modulator. It has been applied for current con-

4 CHAPTER 1. INTRODUCTION
trol in three phase inverters [19], [20], [21], [22], [23], [24], [25], [26], [27], [28],
rectifiers [29], [30], active filters [31], [32], power factor correctors [33], power
factor preregulators [34], [35], uninterruptible power supplies [36], [37], [38], DC-
DC converters [39] and torque control of induction machines [40]. This method
is being used, when a fast dynamic response is required. However, parameters
mismatch, unmodeled delays, and other errors in the model deteriorate control
performance.
Model Predictive Control (MPC) has been successfully used in practical applications
in recent decades. Theoretical results and applications have been presented
in many books and survey papers [41], [42], [43], [44], [45], [46], [47], [48].
The MPC can be divided into two main groups: with continuous control sets,
where modulator realizes switching states, and finite control set MPC, which
directly controls power converter switches.
Feature VSF CSF
Switching Variable Constant
frequency
SVM blocks No No
Coord. trans. No No
Direct control of: Line powers Line powers
Estimation of: Virtual Flux Virtual Flux
and Powers and Powers
Current ripple High Low
Sampling High Low
frequency
Line voltage Yes Yes
sensorless
Table 1.2: Comparison of predictive control methods
The finite control set method (FS-MPC) meets very well discrete nature of
power converters. Taking into account the finite set of possible switching states
of the power converter, which depends on the possible combinations of the “on”
and “off ” switching states of the power switches, the optimization problem is
reduced to the evaluation of all possible states, and selection of the one which
minimizes value of the defined cost function. In view of switching frequency the
FS-MPC methods can be divided into two groups: Variable Switching Frequency
(VSF) and Constant Switching Frequency (CSF). Both approaches have been
briefly compared in Tab. 1.2. Although, one advantage of predictive control
is that its concepts are very simple and intuitive. Using predictive control it is
possible to avoid the cascaded structure, which is typically used in a linear control
scheme. However, power converters are nonlinear systems. Additionally, the
dynamic of cascade structure is limited because of use conventional PI controllers,

5
which properties are deteriorated for low sampling frequencies.
Therefore, the following thesis can be formulated: “using predictive control
of VSC, provides very high dynamics of active and reactive power
control, even for low switching frequency”.
In order to proof the above thesis, author has used an analytical and simulation
based approach, as well as experimental verification on the laboratory set-up
with 5 kVA AC/DC converter.
The thesis consists of seven chapters. Chapter 1 is an introduction and thesis
formulation. Chapter 2 is devoted to presentation of the Voltage Source Converters
(VSC) mathematical models in different coordinate systems. Chapter 3
reviews VSC control methods: VOC, DPC, DPC-SVM. Also, analysis and synthesis
of the controllers is given. Chapter 4 presents analysis and synthesis of
Predictive Direct Power Control methods. Two approaches with variable and
constant switching frequencies have been investigated. Chapter 5 shows investigations
of predictive control methods performance under choke parameters mismatch
and line voltage disturbances. Chapter 6 contains experimental results
and its study. Finally, Chapter 7 presents summary and conclusions. The thesis
is supplemented by Appendices consisted of; coordinate transformations used in
the thesis (App. A), predictive current control (App. B), investigations of cost
function value minimization in CSF predictive control (App. C).
In the author opinion the following parts of the thesis are his main
contributions:
• Development of MATLAB simulation models for basic predictive control
methods for AC/DC Voltage Source Converters:
– Variable Switching Frequency Predictive Direct Power Control (VSF-
P-DPC) – Section 4.3,
– Variable Switching Frequency Predictive Direct Power Control with
Current Harmonics control (HC-VSF-P-DPC) – Section 4.4,
– Variable Switching Frequency Predictive Direct Power Control with
reduced switchings (FL-VSF-P-DPC) – Section 4.5,
– Constant Switching Frequency Predictive Direct Power Control (CSF-
P-DPC) – Section 4.6,
– Virtual Flux based Constant Switching Frequency Predictive Direct
Power Control (VF-CSF-P-DPC) – Section 4.7.
• Comparative simulation study of following control methods: DPC-SVM,
ST-DPC, VSF-P-DPC, HC-VSF-P-DPC, FL-VSF-P-DPC, CSF-P-DPC,
VF-CSF-P-DPC – Section 3.6 and Section 4.8,
• Proposal of Virtual Flux based Constant Switching Frequency Predictive
Direct Power Control VF-CSF-P-DPC method – Section 4.7,

6 CHAPTER 1. INTRODUCTION
• Proposal of “on-line” AC-side choke inductance estimation algorithm – Section
5.2,
• Experimental verification of all investigated control methods on the laboratory
set-up with 5 kVA AC/DC converter – Chapter 6.

Chapter 2
Voltage Source Converter
Main part of the Voltage Source Converter (VSC) is three phase IGBT module,
which consists of six transistors and parallel connected freewheeling diodes. To
design control system and simulation model, it is necessary to define mathematical
model. However, it is difficult to include all nonlinearities of IGBT module,
and therefore following assumptions have been taken into considerations:
• transistors are assumed to be ideal switches (“on” resistance is zero, “off ”
resistance is infinity),
• time delay between control signals and IGBT module is neglected,
• transistor switching off time delay is zero (no dead time),
• no switching loses.
Also, AC-side has been simplified as follows:
• symmetrical line voltages (three sinusoidal voltage supplies with equal amplitudes
and phase shift 120 ◦ ),
• internal resistance of voltage supplies and wires resistance is zero,
• negligible small supply inductance (related to VSC input choke inductance),
• ideal VSC input choke (without saturation effect and impedance coupling).
In this Chapter basic mathematical models of VSC in different coordinate systems
as well as its operation principals will be presented.
7

1.5 k a2kc(t)
Most of the mathematical descriptions of electrical circuits are based on time
domain equations, where quantities like phase voltages and currents are used.
To describe three phase system, large number of equations is needed. However,
circuits without neutral wire give possibility to introduce space vector theory.
Figure 2.1 shows graphical construction of space vector according to (2.1) definia
akb(t)
1
8 CHAPTER 2. VOLTAGE SOURCE CONVERTER
2.1 Space Vector Based Description of VSC
1ka(t)
Figure 2.1: Construction of space vector
k
tion.
a2
k = 2 3 (1k a(t) + ak
a
b (t) + a 2 k c (t)) (2.1)
c
where: 2 3 - normalization factor, 1, a, a2 - complex unity vectors, k
b
a (t), k b (t),
k c (t) - phase quantities which fulfill following condition:
k a (t) + k b (t) + k c (t) = 0 (2.2)
Due to space vector theory, three phase circuits without neutral wire, can
be described in various coordinate systems like stationary, or rotating. It is
powerful mathematical tool which reduces number of equations, and simplifies
control system.
2.2 Mathematical Model of VSC
Main circuit of VSC has been shown in Fig. 2.2. An AC-side block consists of
supply voltage u L and inductor, which inductance and resistance are denoted

(Sa=1, Sc=0) UP2 (Sa=1, UP1 Sb=1, Sb=0, Sc=0) UP3 (Sa=0, Sb=1, Sc=0) 1 1 1
UP5 (Sa=0, Sb=0, Sc=1) UP6 (Sa=1, Sb=0, Sc=1) 0 0 0 A B C 1 1 1
0 0 0 A B C A B C 1 1 1
0 0 0
1 1 1 A B C 1 1 1 A B C 1 1 1 Sc=1) Sb=1, (Sa=0, UP4
0
(Sa=0, Sb=0, Sc=0) 0 0 0 UP0
(Sa=1, Sb=1, Sc=1) 0 0 0 0 0 A B C
UP7
2.2. MATHEMATICAL MODEL OF VSC 9
as L and R respectively. Six IGBT transistors with parallel placed freewheeling
L
Ra uPa iLa uLb uLa Lb La iLb iLc Rb Rc uPb uPc UDC A
C B + IDC ic iload
Lc uLc
O
A
D
Figure 2.2: Scheme of VSC
-
Voltage Source Converter DC-side
diodes create VSC module. There are two transistors connected in series per leg.
Transistor is “on” when gate signal is “1 ” and “off ” when gate signal is “0 ”. Such
AC-side
a topology gives 64 possible states of the converter, however only 8 are permitted
and generates voltage vectors U P . Figure 2.3 shows permitted states of the
converter. It gives 6 active voltage vectors and 2 zero vectors. The converter
1 1 1 A B C 1 1 1
0 0 0 A B C
Figure 2.3: Switching states of VSC
0 0 0

010UP3
β
23
Figure 2.4: Representation of VSC AC-side voltage as space vector
111
110
10 CHAPTER 2. VOLTAGE SOURCE CONVERTER
AC-side voltage can be described as a complex space vector (2.3).
U P (i) =
{
2
3 U DC e j(i−1) π 3 for i = 1 . . . 6
0 for i = 0, 7
(2.3)
Active vectors correspond to phase voltage in relation 1 3 and 2 3
to the DC-link
voltage U DC . Zero vectors apply zero voltage at the AC-side of converter, because
all three branches are connected to positive or negative DC-link bus.
011
UP1 UDC UP4 α UP6 UP0,7 100 000
UP5
001
Voltage Source Converter (VSC) can be represented in different coordinate
systems. Figure 2.5 shows single phase representation of VSC where: U L is space
vector of line voltage, I L is space vector of line current, U
101
P is space vector of VSC
input voltage. The U P voltage is controllable, and depends on applied voltage
vector (see (2.3) and Fig. 2.4). Due to changes of U P magnitude and phase,
line current can be controlled by voltage drop on the input choke. As it can be
noticed, input choke is essential part of the converter, because it brings current
source character, and provides boost feature of converter.
Figure 2.5: Single phase representation of VSC
R
IL UP
Figure 2.6 presents general phasor diagrams for rectification and inverting mode
with and without unity power factor operation.
ULL

IL
UL jωLIL
UL jωLIL
2.2. MATHEMATICAL MODEL OF VSC 11
(a)
(b)
ILUP RIL
RIL
(c)
UP
(d)
Figure 2.6: Phasor diagrams of VSC, on the left rectification mode, on the right
inverting mode: (a), (b) non unity power factor, (c), (d) unity power factor
jωLIL IL UP RIL UL
jωLIL IL UPUL RIL
2.2.1 VSC Model in Natural Coordinates
The line voltage u L equations for balanced three phase system without neutral
wire can be written as:
u La = u m sin(ω L t)
u Lb = u m sin(ω L t + 2π 3 ) (2.4)
u Lc = u m sin(ω L t − 2π 3 )
According to Fig. 2.2, and assuming ideal power switches, VSC can be described
as:
where U i is a voltage drop on VSC choke, defined as:
U L = U i + U P (2.5)
U i = L dI L
dt + RI L (2.6)
Taking into considerations (2.3), and switching states S a , S b , S c of the converter,
AC-side VSC voltage can be described:
U P = U DC (S k − 1 3
c∑
S k ) (2.7)
k=a

iLa sL+RSa uLa 1 -
iLb UDC uPa
- sL+R 1 uLb
UDC
uPb
Sb
-
-
IDC 1 sC UDC - iload ic
13
12 CHAPTER 2. VOLTAGE SOURCE CONVERTER
DC-link current I DC can be calculated as a sum of products of line currents
and appropriate switching states:
I DC = i La S a + i Lb S b + i Lc S c (2.8)
Next, DC-link capacitor current i c , can be calculated (2.9).
1 iLc Sc - uLc uPc
Figure
sL+R
2.7: Block scheme of VSC in natural coordinates
- UDC
i c = I DC − i load (2.9)
where i load is VSC load current (Fig. 2.2).
Hence, DC-link voltage U DC , with assumption of zero initial conditions can be
calculated from:
U DC = 1 C
∫ τ
−∞
i c (τ)dτ (2.10)
Taking into account all above equations, the overall system of three phase

ILα 1 sL+RSα - ULα
32IDC 1 sCUDC UDC UPα
- -
iload ic
Figure 2.8: Block scheme of VSC in stationary coordinates
2.2. MATHEMATICAL MODEL OF VSC 13
VSC can be described as follows:
u La = Ri La + L d dt i La + u P a
u Lb = Ri Lb + L d dt i Lb + u P b (2.11)
u Lc = Ri Lc + L d dt i Lc + u P c
C dU DC
= S a i La + S b i Lb + S c i Lc − i load (2.12)
dt
Figure 2.7 presents basic block diagram of VSC (2.11), (2.12).
2.2.2 VSC Model in Stationary Coordinates
Space vector theory allows to reduce number of equations what is useful in every
control system. After transformation (2.11) and (2.12) into αβ coordinates
(App. A.1), VSC can be described as follow:
U Lαβ = L dI Lαβ
dt
+ RI Lαβ + U P αβ (2.13)
C dU DC
= 3 dt 2 R ( I Lαβ S ∗ αβ)
− iload (2.14)
where: U Lαβ , I Lαβ , U P αβ , S αβ are space vectors in stationary coordinates.
1 sL+R ILβ ULβ
UDC UPβ
After decomposition of space vectors into α and β components, one obtains:
Sβ
U Lα = L dI Lα
dt
+ RI Lα + U P α (2.15)

ILd 1 sL+RSd - UDCUPd ULd
iload ic
14 CHAPTER 2. VOLTAGE SOURCE CONVERTER
U Lβ = L dI Lβ
dt
+ RI Lβ + U P β (2.16)
C dU DC
= 3 dt 2 (I LαS α + I Lβ S β ) − i load (2.17)
Equations (2.15)–(2.17) can be represented as a block diagram in stationary
coordinates as shown in Fig. 2.8.
2.2.3 VSC Model in Rotating Coordinates
Model in stationary coordinates presented in previous subsection, can be transformed
into a two phase model in synchronously rotating dq (App. A.2) coordinates.
After transformation, VSC model can be described as:
U Ldq = L dI Ldq
dt
+ RI Ldq + U P dq + jω L LI Ldq (2.18)
C dU DC
= 3 dt 2 R ( I Ldq S ∗ dq)
− iload (2.19)
where: U Ldq , I Ldq , U P dq , S dq are space vectors in rotating dq coordinates. Note
that, after transformation additional block appears in (2.18), where ω L is angular
frequency of line voltage.
After decomposition of space vectors into d and q components, one obtains:
1 sL+R ILq - UDCUPq ULq
1 sCUDC - ωLL -
Figure 2.9: Block scheme of VSC in rotating dq coordinates
32IDC
U Ld
+ RI Ld + U P d − ω L LI Lq
= L dI Lq
dt
+ RI Lq + U P q + ω L LI Ld
(2.20)
dt
= I Ld S d + I Lq S q − i load
U Lq
C dU DC
= L dI Ld
dt
Sq
Figure 2.9 presents block scheme of VSC in rotating dq coordinates.

2.3. SUMMARY 15
2.3 Summary
In this chapter mathematical models of the Voltage Source Converter (VSC)
have been presented. On the basis of mathematical description simulation models
could be created, which simplify research on control system. To reduce number of
equations, space vector theory has been introduced. It allows to present VSC in
stationary and rotating coordinate systems. An important advantage of rotating
coordinate system is representation three phase AC signals as a DC signals.
Chapter 2 presents basic knowledge about three phase, two level converter,
which allows further analysis of control methods.

Chapter 3
Control Strategies for VSC
3.1 Overview
Several control methods for VSC has been proposed. According to [1] and [4]
these methods can be divided as follow:
• Voltage Oriented Control (VOC),
• Direct Power Control (DPC),
• Direct Power Control with Space Vector Modulator (DPC-SVM).
For line voltage sensorless operation, also concept of Virtual Flux has been presented
[9], [10].
In this Chapter these three groups will be described and characterized.
3.2 Voltage Oriented Control
Voltage Oriented Control - VOC, due to high dynamic and static performance, via
internal current control loops, became very popular, and has been permanently
improved.
The goal of the control system (Fig. 3.1) is to regulate DC-link voltage U DC
to follow reference value U DCref , while line current should be sinusoidal shape
and in phase with line voltage. VOC uses line currents i Labc , line voltages u Labc ,
and DC-link voltage U DC measurements. On the basis of DC-link voltage error
U DCerr , PI controller generates reference value of current in d axis I dref . To fulfill
unity power factor condition, referenced value of I qref current is equal to zero.
Next, current errors are delivered to PI controllers that generate commanded
VSC voltages U P dqref . After transformation into αβ coordinates, U P αβref are
17

Iqref
Idref
ILq ILd
ILq
φ
uLab
UDC
Sabc
18 CHAPTER 3. CONTROL STRATEGIES FOR VSC
delivered to modulator which generates switching signals S abc for VSC. Note that,
due to Virtual Flux approach (see Section 3.5), line voltage measurement can be
avoided.
-
PI
dq
γ
Line Voltage
and Current
Measurement
or
Virtual Flux
Estimator
-
PI
αβ
SVM
Sabc iLab
VSC
PI
-
LOAD
Figure 3.1: Basic block scheme of VOC
UDCref UDC
q
d
Figure 3.2: Vector diagram of VOC
ωL
ILdq
ILd
The most important part of the control system are internal PI current controllers.
Design procedures of current controllers have been presented in [9]
and [49]. It uses symmetry optimum (SO), because its good disturbance (U
ULd
Ldist )

3.2. VOLTAGE ORIENTED CONTROL 19
rejection performance in transient states. Equations (3.1) and (3.2) describe PI
controller proportional gain K C and its time constant T IC :
K C =
T RL
2τ t K RL
(3.1)
T IC = 4τ t (3.2)
where: T RL = L R , K RL = 1 R
is time constant and gain of choke mathematical
model respectively, and τ t is sum of the small time constants defined as:
τ t = T s + T P W M (3.3)
where: T s is sampling time, and T P W M = 1 2 T s is PWM generation time delay.
Figure 3.3 shows block diagram of active current control loop, where τ 0 is
transistors dead time.
U Ldist
I dref
I dreff I Lderr K C (sT IC +1) U dref K VSC e -sτ 0
1
K RL I Ld
sT fC +1
Prefilter
-
I Ld
sT IC
sτ t +1
sT RL +1
PI S&H, VSC Input Choke
-
Figure 3.3: Block diagram of active current I Ld control loop in synchronous
rotating reference coordinates with prefilter
(a)
Step Response
(b)
Step Response
1.5
From: I dref
To: I d
1.5
From: I dref
To: I d
System: dq_PI_c_1
I/O: I_{dref} to I_{d}
Peak amplitude: 1.41
Overshoot (%): 41.1
At time (sec): 0.000849
System: dq_PI_c_1
I/O: I_{dref} to I_{d}
Peak amplitude: 1.07
Overshoot (%): 7.19
At time (sec): 0.00148
1
1
Amplitude
0.5
System: dq_PI_c_1
I/O: I_{dref} to I_{d}
Rise Time (sec): 0.000316
System: dq_PI_c_1
I/O: I_{dref} to I_{d}
Settling Time (sec): 0.00247
Amplitude
0.5
System: dq_PI_c_1
I/O: I_{dref} to I_{d}
Rise Time (sec): 0.000699
System: dq_PI_c_1
I/O: I_{dref} to I_{d}
Settling Time (sec): 0.00201
0
0 0.5 1 1.5 2 2.5 3 3.5
Time (sec)
x 10 −3
0
0 0.5 1 1.5 2 2.5 3 3.5
Time (sec)
x 10 −3
Figure 3.4: Step response of active current control loop in VOC: (a) without
prefilter, (b) with prefilter
However, symmetry optimum design method gives 43% overshoot of tracking
error (Fig. 3.4 (a)), so an additional block with prefilter T fC on referenced current
value is used.
T fC = 4τ t (3.4)

UDC Filter
20 CHAPTER 3. CONTROL STRATEGIES FOR VSC
(a)
(b)
1.5
Discretized Step Response From:I dref
to I d
1.5
Discretized Step Response From:I dref
to I d
1
1
Amplitude
Amplitude
0.5
0.5
0
1 1.0005 1.001 1.0015 1.002 1.0025 1.003 1.0035
Time (sec)
0
1 1.0005 1.001 1.0015 1.002 1.0025 1.003 1.0035
Time (sec)
Figure 3.5: Step response of discretized active current control loop in VOC:
(a) without prefilter, (b) with prefilter
Figures 3.4 and 3.5 show step response of active current control loop without
and with prefilter.
For DC-link voltage controller design, inner current control loop can be represented
as a first order transfer function where Voltage Source Converter time
constant T I depends on inner current control loop.
T I = 4τ t (3.5)
Practical control implementation requires additional low pass filter (LPF) T fUDC
on measured DC-link voltage, which reduces voltage pulsations caused by transistors
switching.
T fUDC = 0.003[s] (3.6)
Control loop can be modeled as shown in Fig. 3.6.
1
+1 sTfU
-
KPU(sTIU+1)
UDCref UDCreff UDCerr Idref iload UDC
sTIU
1
sTIC+1
-
1
sC
Prefilter
PI VSC & Filter DC-link
Capacitor
1
sTfUDC+1
IDC ic
Figure 3.6: Block diagram of DC-link voltage control loop in VOC
UDCf
Symmetry optimum (SO) design method has been used for controller parameters
calculation, which gives:
K P U =
C
2(T I + T fUDC )
(3.7)

3.3. SWITCHING TABLE BASED DIRECT POWER CONTROL 21
T IU = 4(T I + T fUDC ) (3.8)
where: K P U and T IU are DC-link voltage controller proportional gain and time
constant respectively, and C is value of DC-link capacitance. Also, in this case
additional prefilter, with T fU time constant has been added in order to reduce
tracking overshoot.
T fU = 4(T I + T fUDC ) (3.9)
(a)
1.5
Step Response
From: Udc ref
To: Udc
System: VOC_Udc_PI_1
I/O: Udc_{ref} to Udc
Peak amplitude: 1.49
Overshoot (%): 49.5
At time (sec): 0.0169
(b)
1.5
Step Response
From: Udc ref
To: Udc
System: VOC_Udc_PI_1
I/O: Udc_{ref} to Udc
Peak amplitude: 1.09
Overshoot (%): 8.75
At time (sec): 0.0309
1
1
Amplitude
0.5
System: VOC_Udc_PI_1
I/O: Udc_{ref} to Udc
Rise Time (sec): 0.00565
System: VOC_Udc_PI_1
I/O: Udc_{ref} to Udc
Settling Time (sec): 0.0547
Amplitude
0.5
System: VOC_Udc_PI_1
I/O: Udc_{ref} to Udc
Rise Time (sec): 0.0148
System: VOC_Udc_PI_1
I/O: Udc_{ref} to Udc
Settling Time (sec): 0.0436
0
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08
Time (sec)
0
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08
Time (sec)
Figure 3.7: Step response of DC voltage control loop in VOC: (a) without prefilter,
(b) with prefilter
Figure 3.7 shows step response of DC-link voltage control loop.
3.3 Switching Table based Direct Power Control
Main idea of Switching Table based Direct Power Control (ST-DPC) was proposed
in [6]. Referenced active power P ref , delivered from outer PI DC-link
voltage controller, and reactive power Q ref , set to zero for unity power factor,
are compared in hysteresis controllers with estimated P and Q values (Fig. 3.8).
The active power digital hysteresis controller can be described as:
{
1 for P < P
d P =
ref − H P
(3.10)
0 for P > P ref + H P
and similarly for reactive power controller:
{
1 for Q < Q
d Q =
ref − H Q
(3.11)
0 for Q > Q ref + H Q
where: H P and H Q are hysteresis widths.
On the basis of controller digitized outputs d P , d Q and line voltage (or estimated
virtual flux) vector position γ, look-up table selects appropriate space
vector of VSC input voltage U P (see Tab. 3.1 and Tab. 3.2).

Qref
dP dQ
uLab
UDC
Sabc
22 CHAPTER 3. CONTROL STRATEGIES FOR VSC
P
Q
γ
Line Voltage
and Current
Measurement
or
Virtual Flux
Estimator
-
-
Switching
Table
iLab
Sabc
VSC
PI
-
LOAD
Figure 3.8: Block scheme of ST-DPC
UDC
Pref
States
d P d Q 1 2 3 4 5 6 7 8 9 10 11 12
0 0 1 1 2 2 3 3 4 4 5 5 6 6
0 1 2 2 3 3 4 4 5 5 6 6 1 1
1 0 6 0 1 7 2 0 3 7 4 0 5 7
1 1 7 0 0 7 7 0 0 7 7 0 0 7
Sector(γ UL )/Voltage Vector U P (n)
UDCref
Table 3.1: Switching table related to line voltage vector position γ UL
The αβ plane is divided into twelve sectors, as shown in Fig. 3.9. Relation
between sectors and space vector position γ can be expressed as:
{
γ ∈ ⟨n π
sector n =
6 ; (n + 1) π 6
) for line voltage space vector
γ ∈ ⟨n π 6 + 3π 2 ; (n + 1) π 6 + 3π 2
) for virtual flux space vector(3.12)
Sampling frequency has to be about ten times higher than average switching
frequency. It allows to control instantaneous active and reactive power with errors
limited to the hysteresis controllers band. Note that transformation into rotating
coordinate system is not needed, which makes control algorithm implementation
very easy.

4 Sector 5Sector Sector 2
7 Sector 8Sector Sector 5
3.3. SWITCHING TABLE BASED DIRECT POWER CONTROL 23
States Sector(γ ΨL )/Voltage Vector U P (n)
d P d Q 1 2 3 4 5 6 7 8 9 10 11 12
0 0 5 6 6 1 1 2 2 3 3 4 4 5
0 1 6 1 1 2 2 3 3 4 4 5 5 6
1 0 0 5 7 6 0 1 7 2 0 3 7 4
1 1 0 0 7 7 0 0 7 7 0 0 7 7
Table 3.2: Switching table related to virtual flux vector position γ ΨL
(a)
β
(010)
UP3
Sector 3
(b)
β
(110)
UP2
(010)
UP3
Sector 6
(110)
UP2
α
α
(011)
UP4
(100)
UP4 UP1
(011)
(100)
UP1
(001)
6 Sector 7
UP5
(101)
1 Sector 12
UP6
Sector 8Sector 9 Sector 10Sector 11
(001)
9 Sector 10
UP5
Sector 11Sector 12Sector 1Sector 2
(101)
4 Sector 3
UP6
Figure 3.9: Sector selection for: (a) ST-DPC, (b) VF-ST-DPC
Instantaneous active and reactive power can be calculated from measured line
currents i Labc and:
• measured line voltages (3.13), (3.14),
• estimated line voltages (3.17), (3.18),
• estimated virtual flux (3.20), (3.21).
Basic active P and reactive Q power equations are given as:
P = 3 2 R(U LI ∗ L) = 3 2 (U LαI Lα + U Lβ I Lβ ) (3.13)
Q = 3 2 I(U LI ∗ L) = 3 2 (U LβI Lα − U Lα I Lβ ) (3.14)
Taking into consideration VSC mathematical model (2.13), (2.14) line voltage
U L can be calculated as:
where U P is given as:
U Lαβ = L dI Lαβ
dt
+ RI Lαβ + U P αβ (3.15)
U P αβ = U DC S αβ (3.16)

24 CHAPTER 3. CONTROL STRATEGIES FOR VSC
If we assume that voltage drop on choke internal resistance RI Lαβ is small in
relation to voltage drop on choke inductance, active and reactive power can be
calculated by substituting (3.15), (3.16) into (3.13) and (3.14) :
P = 3 ( (
dILα
L
2 dt I Lα + dI )
)
Lβ
dt I Lβ + U DC (S α I Lα + S β I Lβ ) (3.17)
Q = 3 2
( (
dILβ
L
dt I Lα − dI )
)
Lα
dt I Lβ + U DC (S β I Lα − S α I Lβ )
(3.18)
Unfortunately, such calculation causes difficulties in DSP implementation.
The differential operations of line currents are performed with finite differences
and gives noisy signals. Moreover, calculation of the current differences should
be accurate (about ten times per switching period) and should be avoided at
switching instants [50].
To avoid this problem a concept of virtual flux was introduced in [9], [51], [10].
The relation between line voltage and virtual flux (see Section 3.5 for details) is
expressed as:
∫
Ψ Lαβ = Ψ Lαβ0 + U Lαβ dt (3.19)
With the virtual flux approach active and reactive power can be calculated
from:
P = 3 2 ω L (Ψ Lα I Lβ − Ψ Lβ I Lα ) (3.20)
Q = 3 2 ω L (Ψ Lα I Lα + Ψ Lβ I Lβ ) (3.21)
Note that estimation method is based on instantaneous variables, and it allows
to estimate also harmonic components. The ST-DPC becomes very interesting
control algorithm because of advantages:
• high dynamic performance of power control,
• no current control loops,
• no coordinate transformations,
• no pulse width modulator (PWM).
However, it has also following disadvantages:
• high sampling frequency requirement (about ten times higher than average
switching frequency),
• variable switching frequency (it depends on hysteresis controllers bands,
input choke L, DC-link voltage and load),
• difficulties in LC input filter design,

3.4. DIRECT POWER CONTROL WITH SPACE VECTOR MODULATOR 25
• high input choke inductance requirement,
• bipolar voltage switchings (higher switching loses).
The above mentioned difficulties have forced researchers to improve ST-DPC.
For instance by different definition of switching table, use of three level hysteresis
controllers, use of virtual flux instead of line voltage. An approach was proposed
in [13] called Direct Power Control with Space Vector Modulator, which combines
advantages of ST-DPC concept and constant switching frequency.
3.4 Direct Power Control with Space Vector Modulator
Direct Power Control with Space Vector Modulator (DPC-SVM) [13], [49] joins
advantages of well known switching table based DPC and VOC (Voltage Oriented
Control), or VFOC (Virtual Flux Oriented Control). In DPC-SVM active
and reactive powers are used as control variables (Fig. 3.10). However, instead
of hysteresis controllers and switching table, it uses PI power controllers in internal
control loops and space vector modulator (SVM), which guarantees constant
switching frequency. The referenced active power P ref is generated by outer DClink
voltage controller. To fulfill unity power factor condition reactive power Q ref
is set to zero. These values are compared with estimated instantaneous powers
P and Q, calculated from:
• measured line voltages (3.13), (3.14),
• estimated line voltages (3.17), (3.18),
• estimated virtual flux (3.20), (3.21).
Next, power errors are delivered to PI controllers, which generates referenced
voltages in pq coordinates, and after transformation into αβ coordinates are used
for switching signals generation by SVM block.
The most important part of the control system are internal PI power controllers.
Design procedure of power controllers have been presented in [9] and [49].
It uses symmetry optimum (SO), because its good disturbance (U Ldist ) rejection
performance in transient states. Equations (3.22) and (3.23) describe PI controller
gain and time constant:
K P =
T RL
2τ t K RL
2
3|U L |
(3.22)
T I = 4τ t (3.23)
where: K P and T I are power controller proportional gain and time constant
respectively, T RL = L R and K RL = 1 R
is time constant and gain of choke mathematical
model respectively, U L is line voltage, and τ t is sum of the small time

Qref
Pref
uLab
UDC
Sabc
26 CHAPTER 3. CONTROL STRATEGIES FOR VSC
-
P
Q
PI
pq
γ
Line Voltage
and Current
Measurement
or
Virtual Flux
Estimator
-
PI
αβ
SVM
Sabc iLab
VSC
PI
-
LOAD
Figure 3.10: Block scheme of DPC-SVM
UDC
constants defined as:
τ
UDCref
t = T s + T P W M (3.24)
where: T s is sampling time, and T P W M = 1 2 T s is PWM generation time delay.
Figure 3.11 shows block diagram of active power control loop, where τ 0 is
transistors dead time.
U Ldist
P -
ref P reff P err K P (sT I +1) U pref K VSC e -sτ 0
1
K RL I Lp 3 P |UL|
sT fP +1 - sT I
sτ t+1
sT RL+1 2
P
Prefilter
PI S&H, VSC Input Choke
Figure 3.11: Block diagram of active power control loop in synchronous rotating
reference frame with prefilter
However, symmetry optimum design method gives 43% overshoot of tracking
error (Fig. 3.12 (a)), so additional block with prefilter T fP on referenced value is
used.
T fP = 4τ t (3.25)
Figures 3.12 and 3.13 show step response of active power control loop without
and with prefilter.

3.4. DIRECT POWER CONTROL WITH SPACE VECTOR MODULATOR 27
(a)
1.5
From: P ref
To: P 0
System: PQ_PI
I/O: P{ref} to P0
Peak amplitude: 1.41
Overshoot (%): 41.1
At time (sec): 0.000849
(b)
1.5
System: PQ_PI
I/O: P{ref} to P0
Peak amplitude: 1.07
Overshoot (%): 7.19
At time (sec): 0.00148
From: P ref
To: P 0
1
1
0.5
System: PQ_PI
I/O: P{ref} to P0
Rise Time (sec): 0.000316
System: PQ_PI
I/O: P{ref} to P0
Settling Time (sec): 0.00247
0.5
System: PQ_PI
I/O: P{ref} to P0
Rise Time (sec): 0.000699
System: PQ_PI
I/O: P{ref} to P0
Settling Time (sec): 0.00201
0
0 0.5 1 1.5 2 2.5 3 3.5
x 10 −3
0
0 0.5 1 1.5 2 2.5 3 3.5
x 10 −3
Figure 3.12: Step response of active power control loop in DPC-SVM: (a) without
prefilter, (b) with prefilter
(a)
1.5
Discretized Step Response From:P ref
to P 0
(b)
1.5
Discretized Step Response From:P ref
to P 0
1
1
0.5
0.5
0
1 1.0005 1.001 1.0015 1.002 1.0025 1.003 1.0035
Time (sec)
0
1 1.0005 1.001 1.0015 1.002 1.0025 1.003 1.0035
Time (sec)
Figure 3.13: Step response of discretized active power control loop in DPC-SVM:
(a) without prefilter, (b) with prefilter
For DC-link voltage controller design, inner active power control loop can be
represented as a first order transfer function where VSC time constant T I depends
on inner power control loop.
T I = 4τ t (3.26)
Practical control implementation requires additional low pass filter T fUDC on
measured DC-link voltage, which reduces voltage pulsations caused by transistors
switching.
T fUDC = 0.003[s] (3.27)
Control loop can be modeled as shown in Fig. 3.14. Symmetry optimum (SO)
design method has been used for controller parameters calculation, which gives:
K P U =
C
2(T I + T fUDC )
(3.28)

UDC Filter
28 CHAPTER 3. CONTROL STRATEGIES FOR VSC
1
+1 sTfU
-
1
sTI+1
-
1
Prefilter
PI VSC & Filter DC-link
Capacitor
1
sTfUDC+1
UDCref UDCreff UDCerr Pref PLOAD UDC
KPU(sTIU+1)UDCref
PVSR PC
sCUDCref
Figure 3.14: Block diagram of DC-link voltage control loop in DPC-SVM
UDCf
T IU = 4(T I + T fUDC ) (3.29)
where: K P U and T IU are DC-link voltage controller proportional gain and time
constant respectively, and C is value of DC-link capacitance. Also, in this case
additional prefilter, with T fU time constant has been added in order to reduce
tracking overshoot.
T fU = 4(T I + T fUDC ) (3.30)
Figure 3.15 shows step response of DC-link voltage control loop.
1.5
(a)
From: Udc ref
To: Udc
1.5
(b)
From: Udc ref
To: Udc
System: Udc_PI
I/O: Udc_{ref} to Udc
Peak amplitude: 1.49
Overshoot (%): 49.5
At time (sec): 0.0169
System: Udc_PI
I/O: Udc_{ref} to Udc
Peak amplitude: 1.09
Overshoot (%): 8.75
At time (sec): 0.0309
1
1
System: Udc_PI
I/O: Udc_{ref} to Udc
Rise Time (sec): 0.00565
System: Udc_PI
I/O: Udc_{ref} to Udc
Settling Time (sec): 0.0547
System: Udc_PI
I/O: Udc_{ref} to Udc
Rise Time (sec): 0.0148
System: Udc_PI
I/O: Udc_{ref} to Udc
Settling Time (sec): 0.0436
0.5
0.5
0
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08
0
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08
Figure 3.15: Step response of DC voltage control loop in DPC-SVM: (a) without
prefilter, (b) with prefilter
3.5 Virtual Flux Based Control
The concept of Virtual Flux (VF) based approach has been proposed to improve
the VOC scheme [10], and further developed for AC voltage sensorless instantaneous
active and reactive power estimation [4], [7], and [52]. This concept allows
replacing AC-side voltage sensors with a virtual flux estimator, which gives advantages
like:
• natural filtering of line voltage harmonics (∼ 1 n ),

3.5. VIRTUAL FLUX BASED CONTROL 29
• system simplification,
• AC-side voltage sensorless operation,
• isolation between control and power circuit part,
• higher reliability,
• cost reduction.
The VF principle is based on assumption that line voltage and VSC input
choke equations (Fig. 3.16), can be considered as quantities describing virtual
AC motor. Choke resistance R and inductance L represents stator resistance
and stator leakage inductance respectively. Phase to phase voltages U L(ph−ph) can
be considered as induced by virtual flux. Hence, integration of the voltages leads
to virtual flux space vector Ψ L in stationary αβ coordinates. With definition of
the virtual flux vector:
∫
Ψ Lαβ = Ψ Lαβ0 + U Lαβ dt (3.31)
and line voltage U Lαβ given by:
U Lαβ = U P αβ + U Iαβ (3.32)
where: U P αβ is VSC input voltage, and U Iαβ is choke voltage vector defined as:
U Iαβ = L dI Lαβ
dt
+ RI Lαβ (3.33)
If we assume that in (3.33) voltage drop on choke resistance is small in relation
to voltage drop on choke inductance, line voltage U Lαβ space vector can be
calculated from:
U Lαβ = L dI Lαβ
+ U P αβ (3.34)
dt
After substituting (3.34) into (3.31), and assuming that initial conditions Ψ Lαβ0
are equal to zero, yields:
∫
Ψ Lαβ = LI Lαβ + U P αβ dt (3.35)
Converter input voltage U P αβ depends on DC-link voltage U DC value and switching
states S a , S b , and S c , generated by control system. This relation can be
expressed as:
U P αβ = U DC S αβ (3.36)
or by:
U P α = 2 3 U DC
(
S a − 1 )
2 (S b + S c )
(3.37)

ILq
φ
ωL
30 CHAPTER 3. CONTROL STRATEGIES FOR VSC
L
Ra uPa iLa uLb uLa Lb La iLb iLc Rb Rc uPb uPc UDC A
C B +
Lc uLc
Virtual AC Motor
Figure 3.16: Scheme of VSC with AC side presented as a virtual AC motor
-
O
A
D
U P β =
√
3
3 U DC (S b − S c ) (3.38)
Voltage Source Converter DC-side
Finally, virtual flux Ψ
AC-side
Lαβ can be expressed by:
Ψ Lα = 2 3
∫
U DC
(S a − 1 )
2 (S b + S c ) dt + LI Lα (3.39)
√ ∫ 3
Ψ Lβ =
3
U DC (S b − S c ) dt + LI Lβ (3.40)
Note that virtual flux is shifted 90 ◦ in relation to line voltage, which causes
different space vectors orientation (Fig. 3.17).
(a)
q
(b)
q
ULq
φ
ILdILq
ILdq
ILdq ωL ULd
d
Figure 3.17: Relation between line voltage and virtual flux coordinates transformation:
(a) line voltage U Ldq oriented reference coordinates and space vectors,
(b) virtual flux Ψ L oriented reference coordinates and space vectors
Ld
ILd
d

UPα
Lα
Lα
3.5. VIRTUAL FLUX BASED CONTROL 31
On the basis of (3.39) and (3.40) virtual flux estimator with ideal integration
part has been built Fig. 3.18 (a).
(a)
UPα
(b)
I
200
0
ILαL
−200
(c)
2
1
0
I
−1
−2
0 0.1 0.2 0.3 0.4 0.5 0.6
ILβ
Figure 3.18: Virtual flux estimator with ideal integration: (a) block scheme,
(b) estimated line voltage U Lα [V], (c) estimated virtual flux Ψ Lα [Wb]
Lβ
UPβ
As it can be seen in Fig. 3.18 (c), ideal integration produce dc offset, because
it depends on unknown initial conditions Ψ Lαβ0 .
(a)
(b)
-
I
200
0
LPF
−200
ILαL
LPF
(c)
2
1
-
I
0
−1
−2
0 1 2 3 4 5 6
ILβ
Figure 3.19: Virtual flux estimator with low pass filter: (a) block scheme, (b) estimated
line voltage U Lα [V], (c) estimated virtual flux Ψ Lα [Wb]
Lβ
UPβ
To avoid initial condition problem, a low pass filter (LPF) has been implemented
in feedback loop as shown in Fig. 3.19 (a). In this case, even if initial
conditions of integral part are wrong, virtual flux dc offset is being removed after
about 3 seconds Fig. 3.19 (c). To speed up this process, an additional gain part
has been introduced into estimator Fig. 3.20 (a). In this case, dc offset removal
process takes about 300 ms Fig. 3.20 (c).

Lα
32 CHAPTER 3. CONTROL STRATEGIES FOR VSC
(a)
UPα
(b)
-
KI
200
0
K 1 K 1
LPF
−200
ILαL
-
LPF
KI
(c)
2
1
0
−1
−2
0 0.1 0.2 0.3 0.4 0.5 0.6
Figure 3.20:
UPβ
ILβ
Virtual flux estimator with low pass filter and additional gain
Lβ
part K: (a) block scheme, (b) estimated line voltage U Lα [V], (c) estimated
virtual flux Ψ Lα [Wb]
3.6 Simulation Results
Several simulations have been done in order to evaluate described control methods.
Simulations have been focused on properties of Direct Power Control with
Space Vector Modulator DPC-SVM, and Switching Table based Direct Power
Control ST-DPC in steady states as well as in transients.
Quantity
Value
Nominal Power S 0 [kVA] 5
Fundamental Frequency F L [Hz] 50
Supply Voltage u L(RMS) [V] 120
Input Filter Inductance L [mH] 10
Input Filter Resistance R [mΩ] 100
DC-link Capacitance C [µF] 470
Table 3.3: Main data of simulation model
The simulation models have been done in MATLAB - SimPowerTollbox. Table
3.3 shows basic informations about modeled power circuit.
3.6.1 Steady State Operation
Proposed control methods have been compared under steady state operation.
To avoid influence of DC-link voltage control loop, all tests have been carried out
with open loop, and under unity power factor condition Q ref = 0. The reference
value of active power P ref has been set to 2 kW, and the DC side load resistance

3.6. SIMULATION RESULTS 33
has been set to 100 Ω. Table 3.4 summarizes sampling frequencies F s used in
both methods, and achieved line current T HD factors.
Control Method F sw F swAV F swMax F s T HD i
per cycle [kHz] [kHz] [kHz] [%]
DPC-SVM fixed 5 5 5 3.21
ST-DPC var. 4.5 40 40 5.42
Table 3.4: Sampling and switching frequencies of tested control methods
Note that, ST-DPC requires higher sampling frequency than DPC-SVM scheme.
Figures 3.21 and 3.22 show steady state operation. Both controls fulfill unity
power factor condition, and line current i La is in phase with line voltage u la .
Figure 3.24 shows converter voltage measured between converter phase a input
and negative DC bus u P aDC− as well as related number of transistor “on“
and “off “ switchings N Sa per one cycle. For DPC-SVM constant number of
switchings is ensured by Space Vector Modulator, and it is equal to the sampling
frequency.
200
150
100
50
(a)
500
400
300
200
100
(c)
u P a
u La
0.1 0.105 0.11 0.115 0.12
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.1 0.105 0.11 0.115 0.12
15
10
(b)
−500
2500
2000
(d)
P Q
i La
0.1 0.105 0.11 0.115 0.12
5
1500
0
1000
−5
500
−10
0
−15
0.1 0.105 0.11 0.115 0.12
−500
Figure 3.21: Steady state operation of DPC-SVM: (a) line voltage u La [V], (b) line
current i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured
active P [W] and reactive power Q [var]

34 CHAPTER 3. CONTROL STRATEGIES FOR VSC
200
150
100
50
(a)
500
400
300
200
100
(c)
u P a
u La
0.1 0.105 0.11 0.115 0.12
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.1 0.105 0.11 0.115 0.12
15
10
(b)
−500
2500
2000
(d)
P Q
i La
0.1 0.102 0.104 0.106 0.108 0.11 0.112
5
1500
0
1000
−5
500
−10
0
−15
0.1 0.105 0.11 0.115 0.12
−500
Figure 3.22: Steady state operation of ST-DPC: (a) line voltage u La [V], (b) line
current i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured
active P [W] and reactive power Q [var]
5
DPC-SVM
Fundamental (50Hz) = 7.873 , THD= 3.21%
5
ST-DPC
Fundamental (50Hz) = 7.926 , THD= 5.42%
4.5
4.5
4
4
Mag (% of Fundamental)
3.5
3
2.5
2
1.5
Mag (% of Fundamental)
3.5
3
2.5
2
1.5
1
1
0.5
0.5
0
0 50 100 150 200 250 300 350 400
Harmonic order
0
0 50 100 150 200 250 300 350 400
Harmonic order
Figure 3.23: Line current harmonics spectrum
In case of ST-DPC, switching frequency depends on switching table construction,
sampling frequency, hysteresis controllers band, DC-link voltage, and converter
load. For ST-DPC switching table has been designed in order to avoid
transistor switchings under maximum current conduction (Fig. 3.24 (b)).
Figure 3.23 shows line current i L harmonic spectrum up to 20 kHz. In case
of DPC-SVM harmonic spectrum is concentrated around multiple of sampling
frequency. For ST-DPC harmonic spectrum is spread over wide range of frequen-

3.6. SIMULATION RESULTS 35
500
450
DPC-SVM
(a)
500
450
u P aDC−
ST-DPC
u P aDC−
0.1 0.105 0.11 0.115 0.12
400
350
300
250
200
150
100
50
400
350
300
250
200
150
100
50
0
0.1 0.105 0.11 0.115 0.12
250
(b)
0
250
N Sa
N Sa
0.1 0.105 0.11 0.115 0.12
200
200
150
150
100
100
50
50
0
0.1 0.105 0.11 0.115 0.12
0
Figure 3.24: Switchings number of phase a transistor “on” and “off ” switchings
in DPC-SVM and ST-DPC methods: (a) voltage measured between converter
input and negative DC bus u P aDC− [V], (b) number of switchings N Sa in phase a
cies what is caused by variable switching frequency.

36 CHAPTER 3. CONTROL STRATEGIES FOR VSC
3.6.2 Transient Operation
Behavior of discussed control methods have been compared under transient states.
The first test was response to the step change of referenced active power P ref
from 1 to 2 kW, and has been carried out with open DC-link voltage control
loop (Fig. 3.25 – 3.26). As it can be seen, DPC-SVM is about seven times slower
than ST-DPC (see Fig. 3.27). It is caused by higher sampling frequency, which
corresponds to faster response. Also, in case of DPC-SVM coupling between
active and reactive powers can be observed.
200
150
100
50
(a)
500
400
300
200
100
(c)
u P a
u La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
15
10
(b)
−500
(d)
2500
P Q
2000
i La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
5
1500
0
1000
−5
500
−10
0
−15
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
−500
Figure 3.25: Transient operation of DPC-SVM power step change from 1 kW to
2 kW: (a) line voltage u La [V], (b) line current i La [A], (c) VSC input voltage
u P a [V], (d) referenced and measured active P [W] and reactive power Q [var]
Figure 3.28 presents second test, which was response to the step change of
DC-link voltage reference value U DCref from 300 V to 600 V. The DC-link voltage
PI controller has been tuned for each method according to the rules presented in
Section 3.4. For DPC-SVM U DC overshoot was 8 %, and 4 % for ST-DPC. Also,
regulation time was about 30 ms longer than in switching table approach.

3.6. SIMULATION RESULTS 37
200
150
100
50
(a)
500
400
300
200
100
(c)
u P a
u La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
15
10
(b)
−500
(d)
2500
P Q
2000
i La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
5
1500
0
1000
−5
500
−10
0
−15
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
−500
Figure 3.26: Transient operation of ST-DPC power step change from 1 kW to
2 kW: (a) line voltage u La [V], (b) line current i La [A], (c) VSC input voltage
u P a [V], (d) referenced and measured active P [W] and reactive power Q [var]
2500 (a)
P Q
2000
2500 (b)
2000
500 (c)
400
300
u P a
P Q DPC-SVM 0.105 0.106 0.107 0.108 0.109 0.11 0.111 0.112 0.113 0.114
1500
1000
500
0
1500
1000
500
0
200
100
0
−100
−200
−300
−400
−500
−500
0.105 0.106 0.107 0.108 0.109 0.11 0.111 0.112 0.113 0.114
2500
0.105 0.106 0.107 0.108 0.109 0.11 0.111 0.112 0.113 0.114
2500
ST-DPC
−500
500
2000
1500
1000
500
0
2000
1500
1000
500
0
400
300
200
100
0
−100
−200
−300
−400
−500
0.105 0.106 0.107 0.108 0.109 0.11 0.111 0.112 0.113 0.114
−500
−500
0.105 0.106 0.107 0.108 0.109 0.11 0.111 0.112 0.113 0.114 0.105 0.106 0.107 0.108 0.109 0.11 0.111 0.112 0.113 0.114
Figure 3.27: Transient operation of DPC methods step change of referenced
active power P ref from 1 kW to 2 kW in zoom: (a) referenced and measured
active P [W] and reactive power Q [var], (b) sampled referenced and measured
active P [W] and reactive power Q [var], (c) VSC input voltage u P a [V]

38 CHAPTER 3. CONTROL STRATEGIES FOR VSC
650
600
DPC-SVM
200
u La i La 20 (b)
550
10
500
450
0
0
400
350
(a) U DC
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
−10
300
−20
250
500
400
−200
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
8000
7000
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
P Q
(d)
300
6000
200
100
5000
0
4000
−100
3000
−200
2000
−300
1000
−400
(c) u P a
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
0
−500
650
600
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
ST-DPC
(a) U DC
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
200
u La
i La
25
20
(b)
550
15
10
500
5
450
400
350
300
250
500
400
300
200
100
0
−200
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
8000
0
7000
6000
5000
4000
0
−5
−10
−15
−20
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24 −25
P Q
(d)
(c) u P a
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
−100
−200
−300
−400
−500
3000
2000
1000
0
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
Figure 3.28: Transient operation of DPC-SVM and ST-DPC, step change of
referenced DC voltage U DCref from 300 V to 600 V: (a) referenced and measured
DC voltage U DC [V], (b) line voltage u La [V] and line current i La [A], (c) VSC
input voltage u P a [V], (d) referenced and measured active P [W] and reactive
power Q [var]

3.7. SUMMARY 39
3.7 Summary
Principles of three most known grid connected VSC control methods as well as
basics of virtual flux approach have been presented in this Chapter.
The first method is VOC strategy, which uses current control loops with PI
controllers and Space Vector Modulator. The second one is Switching Table
based Direct Power Control (ST-DPC) where modulator and PI controllers have
been replaced by switching table and hysteresis controllers respectively. However,
high sampling frequency requirement, and variable switching frequency make
difficulties in hardware implementation.
Finally, DPC-SVM which combines advantages of VOC and ST-DPC structure
has been presented. It uses PI internal power controllers and SVM block,
which guarantees constant switching frequency. However, system dynamic is
lower than in ST-DPC case, as shown in Tab. 3.5 and Tab. 3.6.
Control Method t set [µs] t r [µs]
DPC-SVM 3500 900
ST-DPC 500 200
Table 3.5: Dynamic properties of DPC methods for P ref step change
Control Method t set [ms] t r [ms] Overshot [%]
DPC-SVM 80 16 8
ST-DPC 45 14 4
Table 3.6: Dynamic properties of DPC methods for U DCref step change

Chapter 4
Predictive Direct Power Control
4.1 Overview
This Chapter presents the main aim of this Thesis, the Predictive Direct Power
Control (P-DPC), a new control where well known Direct Power Control approach
is combined with predictive vectors selection. Different types of P-DPC have been
developed, which differ on converter vector U P selection, and their application
times. Presented algorithms can be divided into two main groups:
• Variable Switching Frequency - VSF
• Constant Switching Frequency - CSF
In the first case, control applies only one voltage vector U P per sampling period.
The appropriate vector is chosen by minimization of the cost function value,
which describes behavior of the system.
In the second case, control selects two active and one zero voltage vectors.
The goal of the predictive control is to calculate optimal vector application times,
in order to minimize cost function value.
Cost function approach makes overall system features change very easy, which
will be shown on current spectrum control, and reduced switching frequency examples.
Also, AC-side voltage sensorless operation will be presented.
4.2 Principles of Model Based Predictive Control
Various control strategies have been proposed in recent works on the Voltage
Source Converters. Although, these control strategies can achieve the same main
goals as low harmonic distorted grid current waveforms and high power factor,
their principles differ. A most popular methods of direct active and reactive power
41

42 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
control (DPC) as well as current control (VOC) have been presented in previous
Chapter.
An important group of control strategies based on Model Predictive Control
(MPC) becomes very popular and has been constantly developed and improved
[47]. Especially, MPC with finite states which meets very well discrete
nature of power converter with digital signal processing (DSP) used for control
algorithm, are widely applied [1] for current [28], [29], [53], and power [54], [55],
[56], [57] control. MPC does not use modulator, and it can be used to control of
any type of converter for example: multilevel Neutral Point Clamped (NPC) [58],
[59], [60], [61], [62], H-bridge converter [63], buck converter [64], [65], or matrix
converter [66], [67], [68], [69].
Due to minimization of cost function value, which defines behavior of the system,
most effective voltage vector is selected for next sampling period. However,
in such a system switching frequency is variable, and depends on sampling frequency,
converter load and parameters variations. To avoid above disadvantages
predictive control with DPC, which operates with constant switching frequency
has been developed [70], [71], [72].
4.3 Variable Switching Frequency Predictive Direct Power
Control
Predictive Direct Power Control with Variable Switching Frequency VSF-P-DPC
is based on mathematical model of the converter. Equations (3.13), (3.14) can
be used for active and reactive power derivative calculation.
dP
dt = 3 (
dI Lα
U Lα
2 dt
+ dU Lα dI Lβ
I Lα + U Lβ
dt
dt
+ dU )
Lβ
I Lβ
dt
(4.1)
dQ
dt = 3 (
dI Lα
U Lβ
2 dt
+ dU Lβ dI Lβ
I Lα − U Lα
dt
dt
− dU )
Lα
I Lβ
dt
(4.2)
Equation (2.13) can be rewritten as:
dI Lαβ
dt
= 1 L (U Lαβ − U P αβ − RI Lαβ ) (4.3)
If we consider sinusoidal and balanced line voltage, following expressions can be
taken into account:
dU Lα
= −ω L U Lβ (4.4)
dt
dU Lβ
dt
= ω L U Lα (4.5)

4.3. VARIABLE SWITCHING FREQUENCY PREDICTIVE DIRECT POWER
CONTROL 43
Replacing (4.3), (4.4) and (4.5) in (4.1) and (4.2) it is possible to get functions
describing instantaneous active and reactive power time derivatives.
dP
dt = 3 ( )
1
2 U Lα
L (U Lα − U P α − RI Lα ) + ω L I Lβ +
( )
3 1
2 U Lβ
L (U Lβ − U P β − RI Lβ ) − ω L I Lα (4.6)
dQ
dt = 3 (
2 U Lα ω L I Lα − 1 )
L (U Lβ − U P β − RI Lβ )
3
2 U Lβ
+
( )
1
L (U Lα − U P α − RI Lα ) + ω L I Lβ
or it might be rewritten as difference equation:
(P + ∆P ) − P
= 3 ( )
1
∆t 2 U Lα
L (U Lα − U P α − RI Lα ) + ω L I Lβ +
( )
3 1
2 U Lβ
L (U Lβ − U P β − RI Lβ ) − ω L I Lα
(4.7)
(4.8)
(Q + ∆Q) − Q
∆t
= 3 (
2 U Lα ω L I Lα − 1 )
L (U Lβ − U P β − RI Lβ ) +
( )
3 1
2 U Lβ
L (U Lα − U P α − RI Lα ) + ω L I Lβ
(4.9)
where: P , Q are active and reactive power, ∆P , ∆Q are power differentials,
and sum of this components gives P P (4.10) and Q P (4.11) predicted active
and reactive power, ∆t is time difference and can be noted as a sampling time
(4.12).
P + ∆P = P P (4.10)
Q + ∆Q = Q P (4.11)
∆t = T s (4.12)
The predicted power values can be expressed as:
P P = 3 ( )
1
2 T s
[U Lα
L (U Lα − U P α − RI Lα ) + ω L I Lβ +
U Lβ
( 1
L (U Lβ − U P β − RI Lβ ) − ω L I Lα
) ]
+ P (4.13)
Q P = 3 (
2 T s
[U Lα ω L I Lα − 1 )
L (U Lβ − U P β − RI Lβ ) +
( ) ] 1
U Lβ
L (U Lα − U P α − RI Lα ) + ω L I Lβ + Q (4.14)

44 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
(a)
(b)
0
∆ P 0
∆ P 7
∆ P 6
∆ P 1
∆ P 2 ∆ P 3
∆ P 4
∆ P 5
0
∆ Q 7
∆ Q 0
∆ Q 4
∆ Q 5
∆ Q 6
∆ Q 1
∆ Q 2
∆ Q 3
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
Figure 4.1: Active (a) and reactive (b) power derivatives behavior under different
U P voltage vectors application
The power derivatives depend on the grid variables, line side inductive filter
parameters and on the converter switching states. Fig. 4.1 shows active ∆P
and reactive ∆Q power derivatives behavior related to different voltage vectors
U P , under unity power factor and steady state operation.
As it was mentioned in Section 2.2, VSC has eight permitted states, which
correspond to eight possible voltage vectors U P . The goal of the VSF-P-DPC
is to calculate powers behavior P , Q for all possible states U P . Voltage vector,
which minimizes cost function value J, defined as:
√
J = (P ref − P P ) 2 + (Q ref − Q P ) 2 (4.15)
is selected for next sampling period.
U Lαβ 200e j45 V P 600 W
I Lαβ 2.82e j90 A Q −600 var
U DC 600 V P ref 600 W
L 0.01 H Q ref 0 var
R 0.1 Ω T s 50 µs
Table 4.1: An example operating conditions of VSF-P-DPC

UPdqUDC
Qref
UDCSabc
uLab
iLab
4.3. VARIABLE SWITCHING FREQUENCY PREDICTIVE DIRECT POWER
CONTROL 45
7
P
PQ
Q
Power Model
Predictive Control
ULαβ ILαβ
(PQ)
αβ
abc
PPQP7
Cost Function
Minimization
VSC
PI
-
LOAD
Pref
Figure 4.2: Control scheme of Variable Switching Frequency Predictive Direct
Power Control VSF-P-DPC
UDCref
U P P P [W] Q P [var] P err [W] Q err [var] J [VA]
U P 1 484.8 -1015.1 115.1 1015.1 1021.6
U P 2 329.5 -435.5 270.4 435.5 512.7
U P 3 753.8 -11.3 -153.8 11.3 154.2
U P 4 1333.3 -166.6 -733.3 166.6 752
U P 5 1488.6 -746.1 -888.6 746.1 1160.3
U P 6 1064.4 -1170.4 -464.4 1170.4 1259.2
U P 0 909.12 -590.8 -309.1 590.8 666.8
Table 4.2: An example operation of VSF-P-DPC
Lets consider VSF-P-DPC operation under conditions listed in Tab. 4.1. On
the basis of (4.13) and (4.14) values of predicted powers P P , Q P are calculated
for every voltage vector. Table 4.2 summarizes results. As it can be seen, the
minimum value of cost function J is achieved by U P 3 voltage vector, and this
vector is selected for next sampling period. Figure 4.3 shows vector diagram of
predicted power in pq coordinates.

Pref, Qref
∆PP2, ∆PP1, ∆QP2
∆QP1
∆PP3, ∆QP3
∆PP0, ∆QP0
∆PP6, ∆QP6
∆PP4, ∆QP4
∆PP5, ∆QP5
46 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
q
p
P,Q
Figure 4.3: Vector diagram of predicted powers in VSF-P-DPC
4.4 Current Harmonics Spectrum Control
Previous subsection described control algorithm where switching state of the converter
is calculated in every sampling period. However, the optimal switching
state is applied during a whole sampling period, which leads to variable switching
frequency, because the same converter state can be optimal for few sampling
periods. The current spectrum is spread over a wide range of frequencies, which
is not advisable in some applications e.g., switching frequency and loses limiting,
input filter design and others. In paper [73] authors presented a predictive current
control with modified cost function. In order to control load current spectrum
a digital filter has been added into cost function. This idea has been adopted into
Variable Switching Frequency Predictive Direct Power Control (VSF-P-DPC)
[55], to achieve fixed line current harmonics spectrum, giving HC-VSF-P-DPC.
Figure 4.4 presents general scheme of proposed control. The prediction procedure
is exactly the same as described in Section 4.3, however cost function is
modified by an additional filter.
√ (
J = F (P ref − P P ) 2) (
+ F (Q ref − Q P ) 2) (4.16)

UPdqUDC
UDCSabc
uLab
iLab
4.4. CURRENT HARMONICS SPECTRUM CONTROL 47
7
P
PQ
Q
Power Model
Predictive Control
ULαβ ILαβ
(PQ)
αβ
abc
PPQP7
Qref Pref
Filter and
Cost Function
Minimization
VSC
PI
-
LOAD
Figure 4.4: Control scheme of Variable Switching Frequency Predictive Direct
Power Control with Current Spectrum Harmonics Control VSF-P-DPC
UDCref
where F is digital filter defined as:
F (z) = b 0z 0 + b 1 z 1 + . . . + b n z n
a 0 z 0 + a 1 z 1 + . . . + a n z n (4.17)
where n is filter order.
If we introduce band stop filter, the desired frequencies will be removed from
the cost function. It means that cost function will have lover value and control
will select more often vectors which produce desired frequencies. So, in order
to concentrate current spectrum at specified frequency an additional band stop
digital filter has to be introduced into the cost function. Figure 4.5 (a) shows
Bode diagram of band stop filter designed for 4 kHz.
On the contrary, to avoid specified frequency a band pass filter (see Fig. 4.5 (b))
has to be introduced into the cost function. In this situation cost function will
have higher value for desired frequency, so control will rarely select vectors, which
will generate that frequency. The cost function has to be modified as follow:
J = √ P 2 err + Q 2 err + K F BP [F (P 2 err) + F (Q 2 err)] (4.18)
where F is filter given by (4.17), K F BP is gain factor and P err , Q err are power

48 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
0
(a)
Bode Diagram
From: Input Point1 To: Output Point1
−50
−100
Magnitude (dB)
−150
−200
System: Band Stop Filter
I/O: Input to Output
Frequency (Hz): 4.02e+003
Magnitude (dB): −266
−250
−300
0
−45
−90
−135
Phase (deg)
−180
−225
System: Band Stop Filter
I/O: Input to Output
Frequency (Hz): 4.02e+003
Phase (deg): −181
−270
−315
−360
10 2 10 3 10 4
Frequency (Hz)
0
(b)
Bode Diagram
From: Input Point To: Output Point
−50
−100
Magnitude (dB)
−150
−200
−250
System: Band Pass Filter
I/O: Input to Output
Frequency (Hz): 4e+003
Magnitude (dB): −0.022
−300
−350
180
135
Phase (deg)
90
45
0
−45
System: Band Pass Filter
I/O: Input to Output
Frequency (Hz): 4e+003
Phase (deg): 2.61
−90
−135
−180
10 2 10 3 10 4
Frequency (Hz)
Figure 4.5: Bode diagrams of cost function digital filters: (a) band stop filter
4 kHz, (b) band pass filter 4 kHz
errors defined as:
P err = P ref − P P (4.19)
Q err = Q ref − Q P (4.20)
However, additional K F BP factor has to be set up individually for different
frequencies what is major drawback of this method. Also, it is difficult to use
it for low frequencies removal, because filter pass band window has to be very
narrow, which leads to high order of the designed filter.

UPdqUDC
Qref Pref
UDCSabc
uLab
iLab
4.5. PREDICTIVE DIRECT POWER CONTROL WITH REDUCED SWITCHING
FREQUENCY 49
Proposed strategy allows to effectively fix the spectrum within a narrow frequency
band. It does not mean that switching frequency is fixed, but it is possible
to form harmonics spectrum if necessary.
Presented algorithm opens new possibilities to control and mix different quantities
like: power, current harmonics spectrum, DC-link voltage, switching frequency,
within single cost function.
4.5 Predictive Direct Power Control with Reduced Switching
Frequency
All described predictive controls work with variable switching frequency, which
depends on sampling frequency, load changes, parameters mismatch. This subsection
will present another type of VSF-P-DPC with reduced switching frequency
FL-VSF-P-DPC.
7
P
PQ
Q
Power Model
Predictive Control
ULαβ ILαβ
(PQ)
αβ
abc
PPQP7
Cost Function
Minimization
PKsw
VSC
PI
-
LOAD
Figure 4.6: Control scheme of VSF-P-DPC with Reduced Switching Frequency
FL-VSF-P-DPC
UDCref
In order to reduce switching frequency cost function J has been modified by
additional coefficient K sw related with VSC switching states. The most privileged
voltage vectors are those, which provide zero or only one transistor switching
(the previous one, or neighbor). The worst case is when all three branches have

50 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
to be switched. Table 4.3 describes relation between the new one and previous
voltage vector.
Vector 0 1 2 3 4 5 6 7
0 0 1 2 1 2 1 2 3
1 1 0 1 2 3 2 1 2
2 2 1 0 1 2 3 2 1
3 1 2 1 0 1 2 3 2
4 2 3 2 1 0 1 2 1
5 1 2 3 2 1 0 1 2
6 2 1 2 3 2 1 0 1
7 3 2 1 2 1 2 1 0
Table 4.3: Number of switchings N S
K sw =
{
0 for N S 1
1 for N S 2
(4.21)
The K sw coefficient can take value zero for no, or one transistor switching, or one,
for other cases (4.21). Figure 4.6 presents general scheme of proposed method.
The prediction procedure is exactly the same as described in Section 4.3.
Therefore, the cost function has been modified by:
J =
√
(P ref − P P ) 2 + (Q ref − Q P ) 2 + K sw P (4.22)
4.6 Constant Switching Frequency Predictive Direct Power
Control
Main drawback of previously presented systems was variable switching frequency,
which depends on sampling frequency, system load and parameters variations. As
it was shown, cost function modification has wide control possibilities, and can be
used to limit or gain selected current spectrum harmonics. However, the switching
frequency still is not constant. Therefore, this Section presents a control method
which combines advantages of predictive control with DPC and operates with
constant switching frequency [48], [71].
4.6.1 Predictive Model of the Instantaneous Power Behavior
The Constant Switching Frequency Predictive Direct Power Control CSF-P-DPC
is based on predictive model of the instantaneous active P and reactive Q powers,

4.6. CONSTANT SWITCHING FREQUENCY PREDICTIVE DIRECT POWER
CONTROL 51
which has been explained in Section 4.3. Lets rewrite power derivative equations
for two level VSC with inductive filter.
dP
dt = 3 ( )
1
2 U Lα
L (U Lα − U P α − RI Lα ) + ω L I Lβ +
( )
3 1
2 U Lβ
L (U Lβ − U P β − RI Lβ ) − ω L I Lα
(4.23)
dQ
dt = 3 (
2 U Lα ω L I Lα − 1 )
L (U Lβ − U P β − RI Lβ )
3
2 U Lβ
+
( )
1
L (U Lα − U P α − RI Lα ) + ω L I Lβ
(4.24)
If we take into consideration following assumptions:
• VSC input voltage is kept constant during U P vector application,
• line voltage vector U L does not change during that time period,
• current variations are small,
active and reactive power increments can be considered as a constant for applied
vector U P . These assumptions allow to analysis powers behavior for few applied
vectors U P during single sampling time.
Active and reactive power increments f pi , f qi caused, by voltage vector U P
application, are defined as follow:
f pi = dP
dt
f qi = dQ
dt
where i is number of applied voltage vector.
∥ (4.25)
UP =U P i
∥ (4.26)
UP =U P i
The relation between power behavior, voltage vector and application time can
be expressed as:
P P i = P + f pi t i (4.27)
Q P i = Q + f qi t i (4.28)
where P P i and Q P i are predicted powers for specified t i application time of voltage
vector U P i .

PP1
fp1 fp2 fp3
PP2 t3
t2 t1
QP2 QP3
fq1 fq2 fq3
QP1
PP3
52 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
4.6.2 Voltage Vectors Sequence
Lets consider situation when three voltage vectors are selected within sampling
time, then (4.27), (4.28) can be rewritten:
P P 1 = P + f p1 t 1
P P 2 = P P 1 + f p2 t 2
P P 3 = P P 2 + f p3 t 3
(4.29)
Q P 1 = Q + f q1 t 1
Q P 2 = Q P 1 + f q2 t 2
Q P 3 = Q P 2 + f q3 t 3
(4.30)
T s = t 1 + t 2 + t 3 (4.31)
where t 1 , t 2 , t 3 are voltage vectors application times. Figure 4.7 shows graphical
representation of (4.29), (4.30) and (4.31). Relations (4.29) – (4.31) can be
P
(a)
P
Q
(b)
Q
Figure 4.7: Active (a) and reactive (b) power changes under three U P i voltage
vectors application during one sampling time T s
t2 t3
Ts
t1
simplified to:
P P 3 = P + f p1 t 1 + f p2 t 2 + f p3 t 3
Q P 3 = Q + f q1 t 1 + f q2 t 2 + f q3 t 3
T s = t 1 + t 2 + t 3
(4.32)

PP1
fq1 fq2
PP4
PP5 PP6
PP3 fp3 fp3 PP2 fp2 fp1
t2
t3
t1
fq2 fq1 QP5 QP2 fq3QP3
QP6
4.6. CONSTANT SWITCHING FREQUENCY PREDICTIVE DIRECT POWER
CONTROL 53
To achieve symmetrical vectors application within one sampling time (4.29) –
(4.31) change into:
P P 1 = P + f p1 t 1 P P 4 = P P 3 + f p3 t 3
P P 2 = P P 1 + f p2 t 2 P P 5 = P P 4 + f p2 t 2
(4.33)
P P 3 = P P 2 + f p3 t 3 P P 6 = P P 5 + f p1 t 1
Q P 1 = Q + f q1 t 1 Q P 4 = Q P 3 + f q3 t 3
Q P 2 = Q P 1 + f q2 t 2 Q P 5 = Q P 4 + f q2 t 2
(4.34)
Q P 3 = Q P 2 + f q3 t 3 Q P 6 = Q P 5 + f q1 t 1
T s = 2 (t 1 + t 2 + t 3 ) (4.35)
Figure 4.8 shows graphical representation of (4.33), (4.34), (4.35). Set of (4.33),
P
(a)
P
Q
(b)
fp1 fp2
t3
t2 t1
Q
Figure 4.8: Active (a) and reactive (b) power changes under symmetrical application
of three voltage vectors U P i during one sampling time T s
Ts
QP1
t2 t3
t1
fq3QP4
t1
t2 t3
(4.34), (4.35) can be simplified to:
P P 6 = P + 2f p1 t 1 + 2f p2 t 2 + 2f p3 t 3
Q P 6 = Q + 2f q1 t 1 + 2f q2 t 2 + 2f q3 t 3
T s = 2 (t 1 + t 2 + t 3 )
(4.36)
4.6.3 Voltage Vector Selection
The converter voltage vectors should be selected in order to minimize line current
ripples. It can be achieved by applying voltage vectors, which are nearest located
to the line voltage space vector U L . So, selection of the applied U P depends on

Sector 2
54 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
line voltage space vector position. The voltage plane is divided into twelve subsectors,
exactly the same as in case of ST-DPC, see Fig. 3.9. The smallest current
ripples can be achieved by application sequence of neighboring VSC vectors.
Figure 4.9 shows an example of vector selection. Line voltage space vector
is located in the first sector, so the switching sequence of U P is set to {1, 2, 7}.
Table 4.4 summarizes U P sequences for all sectors.
β
Sector 3
(110)
UP2
(000)
UP0
(111)
UP7
α
UL
(100)
UP1
(101)
1
Sector 11 Sector 12
UP6
Figure 4.9: Converter voltage vector U P selection in 1st sector
Figure 4.10 shows graphical representation of U P sequences for all sectors.
As it can be seen in Fig. 4.10, switching table (Tab. 4.4) has been constructed in
order to reduce transistors switching loses. Note that, the U P sequence has been
chosen in such way that VSC leg switchings do not happen during maximum line
current conduction, and there are only two switchings per sampling time T s .
4.6.4 Voltage Vectors Application Times
Taking into account (4.36) and constant switching frequency requirement, control
method has to determine t 1 , t 2 and t 3 voltage vectors application times.
The predicted power values at the end of sampling time P P 6 , Q P 6 are considered
as a referenced ones P ref , Q ref .
P ref = P P 6
Q ref = Q P 6
(4.37)

Sb Sc Sa
Sb Sa
Sc
Sb Sa
4.6. CONSTANT SWITCHING FREQUENCY PREDICTIVE DIRECT POWER
CONTROL 55
Sector U P sequence
1 1 2 7 7 2 1
2 0 1 2 2 1 0
3 0 3 2 2 3 0
4 3 2 7 7 2 3
5 3 4 7 7 4 3
6 0 3 4 4 3 0
7 0 5 4 4 5 0
8 5 4 7 7 4 5
9 5 6 7 7 6 5
10 0 5 6 6 5 0
11 0 1 6 6 1 0
12 1 6 7 7 6 1
Table 4.4: Switching table related to line voltage vector position γ UL
1 2 7 7 2 1
0 1 2 2 1 0
0 3 2 2 3 0
Sector 1 Sector 2 Sector 3
Sb Sc Sa
Sb Sc Sa
3 2 7 7 2 3
3 4 7 7 4 3
0 3 4 4 3 0
Sector 4 Sector 5 Sector 6
Sb Sc Sa
Sb Sc Sa
0 5 4 4 5 0
5 4 7 7 4 5
5 6 7 7 6 5
0 5 6 6 5 0
0 1 6 6 1 0
1 6 7 7 6 1
Sector 7 Sector 8 Sector 9
Sb Sc Sa
Sb Sc Sa
Sc
Sector 10 Sector 11 Sector 12
Figure 4.10: Graphical representation of converter voltage vector U P selection
Sb Sa
Sb Sa
Sb Sa
Sc
Sc
Active P err and reactive Q err power errors have been expressed as follow:
Sc
( ))
1
P err = P ref − P − 2
(f p1 t 1 + f p2 t 2 + f p3
2 T s − t 1 − t 2 (4.38)

56 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
( ))
1
Q err = Q ref − Q − 2
(f q1 t 1 + f q2 t 2 + f q3
2 T s − t 1 − t 2
(4.39)
To minimize power errors, least square optimization method has been introduced.
The cost function J has been defined as a sum of squared errors:
and after replacing (4.38) and (4.39) into (4.40):
J = P 2 err + Q 2 err (4.40)
J = [ P ref − P − 2 ( f p1 t 1 + f p2 t 2 + f p3
( 1
2 T s − t 1 − t 2
))] 2
+ [ Q ref − Q − 2 ( f q1 t 1 + f q2 t 2 + f q3
( 1
2 T s − t 1 − t 2
))] 2 (4.41)
The optimal application times t 1 , t 2 , t 3 , which minimize cost function value J,
during sampling time T s , satisfies minimum value condition:
⎧
⎪⎨
⎪⎩
∂J
∂t 1
= 0
∂J
∂t 2
= 0
(4.42)
Partial differences of J function are expressed as:
∂J
∂t 1
= 4 [ (P ref − P − f p3 T s ) (f p3 − f p1 ) + (Q ref − Q − f q3 T s ) (f q3 − f q1 ) ]
+ 8 [ (f p3 − f p1 ) 2 + (f q3 − f q1 ) 2] t 1
+ 8 [ (f p3 − f p2 )(f p3 − f p1 ) + (f q3 − f q2 )(f q3 − f q1 ) ] (4.43)
t 2
∂J
∂t 2
= 4 [(P ref − P − f p3 T s ) (f p3 − f p2 ) + (Q ref − Q − f q3 T s ) (f q3 − f q2 )]
+ 8 [(f p3 − f p1 )(f p3 − f p2 ) + (f q3 − f q1 )(f q3 − f q2 )] t 1
+ 8 [ (4.44)
(f p3 − f p2 ) 2 + (f q3 − f q2 ) 2] t 2
The J gets minimum value when (4.43), (4.44) are equal to zero (4.42). The solution
of sets of conditions are application times given by:
[
t 1 = (P ref − P )(f q2 − f q3 ) + (Q ref − Q)(f p3 − f p2 )
+ (f p2 f q3 − f p3 f q2 )T s
]/
[
]
2((f q2 − f q3 )f p1 + (f q3 − f q1 )f p2 + (f q1 − f q2 )f p3 )
(4.45)
t 2 =
[
(P ref − P )(f q3 − f q1 ) + (Q ref − Q)(f p1 − f p3 )
+ (f q1 f p3 − f q3 f p1 )T s
]/
[
]
2((f q2 − f q3 )f p1 + (f q3 − f q1 )f p2 + (f q1 − f q2 )f p3 )
(4.46)
t 3 = 1 2 T s − t 1 − t 2 (4.47)
Appendix C shows an example operation of presented control method for
specified conditions.

fqi fpi
Qref
Sabc
4.6. CONSTANT SWITCHING FREQUENCY PREDICTIVE DIRECT POWER
CONTROL 57
4.6.5 Control Scheme of CSF-P-DPC
Control scheme of proposed method has been presented in Fig. 4.11. System uses
linear PI controller in outer DC-link voltage stabilization loop. Instantaneous
active P and reactive Q powers are calculated on the basis of line voltages U L ,
and line currents I L measurement (3.13), (3.14). Also, line voltage space vector
U Lαβ is delivered to switching table (Tab. 4.4), which selects sequence of VSC
input vectors (Fig. 4.10).
Next, the power predictive model, calculates power time derivatives f pi , f qi
(4.25), (4.26) for appropriate voltage vectors U P . The goal of the control is to
determine U P application times t 1 , t 2 and t 3 (4.45) – (4.47) in order to minimize
cost function value J defined as a sum of squared instantaneous power errors
(4.40).
αβ
uLab
ULαβ
abc
Active & Reactive
Power Calculation
ILαβ
iLab
Q
P
Switching
Table
ULαβ
Cost Function
Minimization
Criteria
Power Predictive
Model
VSC
PI
-
LOAD
Figure 4.11: Control scheme of Constant Switching Frequency Predictive Direct
Power Control CSF-P-DPC
Pref
UDC UDCref

58 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
4.7 Virtual Flux Based Constant Switching Frequency Predictive
Direct Power Control
This part of dissertation will be focused on implementation of Virtual Flux approach
into Constant Switching Frequency Predictive Direct Power Control (VF-
CSF-P-DPC) [48], [52].
4.7.1 Virtual Flux Based Predictive Model of the Instantaneous Power
Behavior
Principles of Virtual Flux concept have been presented in Section 3.5. For sinusoidal
and balanced voltage, neglecting grid side choke resistance R = 0, the instantaneous
power can be computed as (3.20), (3.21):
P = 3 2 ω L (Ψ Lα I Lβ − Ψ Lβ I Lα ) (4.48)
Q = 3 2 ω L (Ψ Lα I Lα + Ψ Lβ I Lβ ) (4.49)
The VF-CSF-P-DPC is based on instantaneous power time derivatives behavior
prediction. Variations of active and reactive power can be calculated from
following equations:
dP
dt = 3ω (
L dI Lβ
Ψ Lα
2 dt
dQ
dt = 3ω L
2
(
Ψ Lα
dI Lα
dt
+ dΨ Lα
d
I dI Lα
Lβ − Ψ Lβ
dt
+ dΨ Lα
d
I dI Lβ
Lα + Ψ Lβ
dt
− dΨ )
Lβ
d
I Lα
)
+ dΨ Lβ
d
I Lβ
(4.50)
(4.51)
where dI Lαβ
dt
is defined by (4.3).
If we consider sinusoidal and balanced line voltage, following expressions can
be taken into account:
Ψ Lα = U Lβ
ω L
(4.52)
Ψ Lβ = − U Lα
ω L
(4.53)
dΨ Lα
= −ω L Ψ Lβ (4.54)
dt
dΨ Lβ
= ω L Ψ Lα (4.55)
dt
Replacing (4.3), (4.52) – (4.55) into (4.50), (4.51) power derivatives can be
expressed as:
(
)
dP
dt
= 3 2 ω 1
L Ψ Lα L (U Lβ − U P β − RI Lβ ) − ω L Ψ Lβ I Lβ
(
)
− 3 2 ω 1
L Ψ Lβ L (U (4.56)
Lα − U P α − RI Lα ) + ω L Ψ Lα I Lα

4.7. VF BASED CSF - PREDICTIVE DIRECT POWER CONTROL 59
dQ
dt
(
)
= 3 2 ω 1
L Ψ Lα L (U Lα − U P α − RI Lα ) − ω L Ψ Lβ I Lα
(
)
+ 3 2 ω 1
L Ψ Lβ L (U (4.57)
Lβ − U P β − RI Lβ ) + ω L Ψ Lα I Lβ
dP
dt
= −ω L Q + 3ω L
2
[Ψ Lα (Ψ Lα ω L − U P β − RI Lβ ) −
]
− Ψ Lβ (−ω L Ψ Lβ − U P α − RI Lα ) =
[
)
]
= −ω L Q + 3ω L
2
ω L
(Ψ (4.58)
2 Lα + Ψ2 Lβ
− I (U P Ψ ∗ L ) − IR (I LΨ ∗ L )
dQ
dt
= ω L P 3ω L
2
[Ψ Lα (−ω L Ψ Lβ − U P α − RI Lα ) +
]
+ Ψ Lβ (ω L Ψ Lα − U P β − RI Lβ ) =
[
]
= ω L P − 3ω L
2
R (U P Ψ ∗ L ) + RR (I LΨ ∗ L )
(4.59)
If we assume that choke resistance value is negligible small R = 0 then (4.58),
(4.59) can be expressed as:
[
) ]
dP
dt
= −ω L Q + 3ω L
2
ω L
(Ψ 2 Lα + Ψ2 Lβ
− I (U P Ψ ∗ L )
dQ
dt
[ ]
= ω L P − 3ω L
2
R (U P Ψ ∗ L ) (4.60)
Active and reactive power increments f pi , f qi caused by voltage vector U P
application are defined as in (4.25), (4.26).
4.7.2 Voltage Vector Selection
As it was explained in Section 3.5, control system synchronization with Virtual
Flux reference frame causes 90 ◦ shifting of space vectors in relation to the line
voltage (see Fig. 3.17).
It leads with different sectors definition, as shown in Fig. 4.12.
Also, switching table has to be changed:
4.7.3 Control Scheme of VF-CSF-P-DPC
Virtual Flux approach is very universal, because it allows to remove line voltage
measurement, without additional hardware changes (Fig. 4.13).

Sector 5
1
Figure 4.12: Converter voltage vector U P selection
ΨL Sector
60 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
β
Sector 6
(110)
UP2
(000)
UP0
(111)
UP7
α
UL
(100)
UP1
(101)
4
Sector 2 Sector 3
UP6
Sector U P sequence
1 0 5 6 6 5 0
2 0 1 6 6 1 0
3 1 6 7 7 6 1
4 1 2 7 7 2 1
5 0 1 2 2 1 0
6 0 3 2 2 3 0
7 3 2 7 7 2 3
8 3 4 7 7 4 3
9 0 3 4 4 3 0
10 0 5 4 4 5 0
11 5 4 7 7 4 5
12 5 6 7 7 6 5
Table 4.5: Switching table related to virtual flux vector position γ ΨL
Control system uses common with CSF-P-DPC blocks like:
• DC-link stabilization loop,
• coordinates transformations (A.2),
• cost function minimization criteria (4.45) – (4.47).
The differences come from:

Qref
fpi
Sabc
iLab
4.7. VF BASED CSF - PREDICTIVE DIRECT POWER CONTROL 61
Virtual Flux
Estimator
ΨLαβ
Active & Reactive
Power Calculation
UDC Sabc ILαβ
αβ
abc
Q
P
Switching
Table
Cost Function
Minimization
Criteria
Power Predictive
Model
ILαβ
VSC
PI
LOAD
UDCref UDC
Pref fqi
Figure 4.13: Control scheme of Virtual Flux Based Constant Switching Frequency
Predictive Direct Power Control VF-CSF-P-DPC
-
• power calculations (3.13), (3.14) and (3.20), (3.21),
• switching table and sectors definition Tab. 4.4 and Tab. 4.5,
• power predictive model (4.23), (4.24) and (4.60).

62 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
4.8 Simulation Results
In order to verify developed control methods, several simulations have been carried
out. Control strategies have been tested under steady state and transient
conditions. The basic simulation parameters have been listed in Tab. 4.6.
Quantity
Value
Nominal Power S 0 [kVA] 5
Fundamental Frequency F L [Hz] 50
Supply Voltage u L(RMS) [V] 120
Input Filter Inductance L [mH] 10
Input Filter Resistance R [mΩ] 100
DC-link Capacitance C [µF] 470
Table 4.6: Main data of simulation model
4.8.1 Steady State Operation
Proposed control methods have been compared under steady state operation.
To avoid DC voltage control loop influence, all tests have been carried out with
open loop, and under unity power factor condition Q ref = 0. The reference
value of active power P ref has been set to 2 kW, and the DC side load resistance
has been set to 100 Ω. Table 4.7 summarizes sampling frequencies F s used in
every method and achieved line current T HD factors. Note that variable switch-
Control Method F sw F swAV F swMax F s T HD i
per cycle [kHz] [kHz] [kHz] [%]
VSF-P-DPC var. 4.5 20 20 5.41
HC-VSF-P-DPC var. 8.1 40 40 3.57
FL-VSF-P-DPC var. 3.75 20 20 5.97
CSF-P-DPC fixed 5 7.5 7.5 3.59
VF-CSF-P-DPC fixed 5 7.5 7.5 3.53
Table 4.7: Sampling and switching frequencies of tested control methods
ing frequency (VSF) methods require higher sampling frequency than the CSF
methods.
Figures 4.14 – 4.18 show steady state operation. All controls fulfill unity power
factor condition, and line current i La is in phase with line voltage u la . However, it
can be seen that VSF methods allow bipolar switchings (Fig. 4.14 (c) – 4.16 (c)),
because converter voltage vector U P selection is not limited by switching table,
like in CSF methods.

4.8. SIMULATION RESULTS 63
200
150
100
50
(a)
500
400
300
200
100
(c)
u P a
u La
0.1 0.105 0.11 0.115 0.12
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.1 0.105 0.11 0.115 0.12
15
10
(b)
−500
2500
2000
(d)
P Q
i La
0.1 0.105 0.11 0.115 0.12
5
1500
0
1000
−5
500
−10
0
−15
0.1 0.105 0.11 0.115 0.12
−500
Figure 4.14: Steady state operation of VSF-P-DPC: (a) line voltage u La [V],
(b) line current i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured
active P [W] and reactive power Q [var]
200
150
100
50
(a)
500
400
300
200
100
(c)
u P a
u La
0.1 0.105 0.11 0.115 0.12
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.1 0.105 0.11 0.115 0.12
15
10
(b)
−500
2500
2000
(d)
P Q
i La
0.1 0.105 0.11 0.115 0.12
5
1500
0
1000
−5
500
−10
0
−15
0.1 0.105 0.11 0.115 0.12
−500
0.1 0.102 0.104 0.106 0.108 0.11 0.112 0.114 0.116 0.118
Figure 4.15: Steady state operation of HC-VSF-P-DPC: (a) line voltage u La [V],
(b) line current i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured
active P [W] and reactive power Q [var]

64 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
(a)
200
150
100
50
(c)
500
400
300
200
100
u P a
u La
0.1 0.105 0.11 0.115 0.12
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.1 0.105 0.11 0.115 0.12
15
10
(b)
−500
2500
2000
(d)
P Q
i La
0.1 0.105 0.11 0.115 0.12
5
1500
0
1000
−5
500
−10
0
−15
0.1 0.105 0.11 0.115 0.12
Figure 4.16: Steady state operation of FL-VSF-P-DPC: (a) line voltage u La [V],
(b) line current i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured
active P [W] and reactive power Q [var]
−500
200
150
100
50
(a)
500
400
300
200
100
(c)
u P a
u La
0.1 0.105 0.11 0.115 0.12
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.1 0.105 0.11 0.115 0.12
15
10
(b)
−500
2500
2000
(d)
P Q
i La
0.1 0.105 0.11 0.115 0.12
5
1500
0
1000
−5
500
−10
0
−15
0.1 0.105 0.11 0.115 0.12
−500
Figure 4.17: Steady state operation of CSF-P-DPC: (a) line voltage u La [V],
(b) line current i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured
active P [W] and reactive power Q [var]

4.8. SIMULATION RESULTS 65
200
150
100
50
(a)
0.8
0.6
0.4
0.2
500
400
300
200
100
(c)
u P a
u La ψ La
0.2 0.205 0.21 0.215 0.22
0
0
0
−50
−100
−150
−100
−0.2
−200
−0.4
−300
−0.6
−400
−200
0.2 0.205 0.21 0.215 0.22 −0.8
−500
0.2 0.205 0.21 0.215 0.22
15
10
(b)
2500
2000
(d)
P Q
i La
0.2 0.205 0.21 0.215 0.22
5
1500
0
1000
−5
500
−10
0
−15
0.2 0.205 0.21 0.215 0.22
−500
Figure 4.18: Steady state operation of VF-CSF-P-DPC: (a) line voltage u La [V]
and estimated virtual flux ψ La [Wb], (b) line current i La [A], (c) VSC input voltage
u P a [V], (d) referenced and measured active P [W] and reactive power Q [var]
Figure 4.19 shows converter voltage, measured between converter phase a input,
and negative DC bus u P aDC− as well as related number of transistor “on“
and “off “ switchings N Sa , per one cycle.
For VSF-P-DPC and FL-VSF-P-DPC, N Sa goes around 180 and 150 switchings
respectively, and in case of HC-VSF-P-DPC is about 325 what is caused by
two times higher sampling frequency F s .
Figure 4.19 shows also u P aDC− and N Sa for constant switching frequency
approach. It can be seen that there is no transistor switchings under maximum
current conduction. It allows to significantly reduce transistors commutation
loses.
Figure 4.20 shows line current i L harmonic spectrum up to 20 kHz. In case of
VSF-P-DPC and FL-VSF-P-DPC harmonic spectrum is spread over wide range of
frequencies. The HC-VSF-P-DPC allows to concentrate spectrum within desired
frequency (in presented case around 4 kHz Fig. 4.5 (a)). For constant switching
approach current spectrum is concentrated around maximum switching frequency
F swMax , which leads to sampling F s .
Table 4.7 summarizes T HD i factors. As it can been seen, the lowest T HD i
is achieved by CSF approach (around 3.5% – 3.6%), also HC-VSF-P-DPC has
low T HD i , however it is occupied by higher switching and sampling frequencies.

66 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
500
450
(a)
VSF-P-DPC
250
N Sa
u P aDC−
0.1 0.105 0.11 0.115 0.12
(b)
400
200
350
300
150
250
200
100
150
100
50
50
0
0.1 0.105 0.11 0.115 0.12
500
250
450
0
FL-VSF-P-DPC
400
200
350
300
150
250
200
100
150
100
50
50
500
0
0.1 0.105 0.11 0.115 0.12
350
0
0.1 0.105 0.11 0.115 0.12
HC-VSF-P-DPC
450
400
350
300
250
200
150
100
50
300
250
200
150
100
50
500
450
0
0.1 0.105 0.11 0.115 0.12
CSF-P-DPC
250
0
0.1 0.105 0.11 0.115 0.12
400
200
350
300
150
250
200
100
150
100
50
50
500
450
0
0.1 0.105 0.11 0.115 0.12
VF-CSF-P-DPC
250
0
0.1 0.105 0.11 0.115 0.12
400
200
350
300
150
250
200
100
150
100
50
50
0
0.2 0.205 0.21 0.215 0.22
0
0.2 0.205 0.21 0.215 0.22
Figure 4.19: Number of phase a transistor on and off switchings in predictive
methods (a) voltage measured between converter input and negative DC bus
u P aDC− [V], (b) number of switchings N Sa in phase a

4.8. SIMULATION RESULTS 67
Mag (% of Fundamental)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
5
4.5
4
VSF-P-DPC
Fundamental (50Hz) = 7.903 , THD= 5.41%
0 50 100 150 200 250 300 350 400
Harmonic order
HC-VSF-P-DPC
Fundamental (50Hz) = 7.882 , THD= 3.57%
Mag (% of Fundamental)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
5
4.5
4
FL-VSF-P-DPC
Fundamental (50Hz) = 7.848 , THD= 5.97%
0 50 100 150 200 250 300 350 400
Harmonic order
CSF-P-DPC
Fundamental (50Hz) = 7.875 , THD= 3.59%
Mag (% of Fundamental)
3.5
3
2.5
2
1.5
Mag (% of Fundamental)
3.5
3
2.5
2
1.5
1
1
0.5
0.5
0
0
0 50 100 150 200 250 300 350 400
Harmonic order
VF-CSF-P-DPC
Fundamental (50Hz) = 8.019 , THD= 3.53%
5
0 50 100 150 200 250 300 350 400
Harmonic order
4.5
4
Mag (% of Fundamental)
3.5
3
2.5
2
1.5
1
0.5
0
0 50 100 150 200 250 300 350 400
Harmonic order
Figure 4.20: Line current harmonics spectrum
4.8.2 Transient Operation
Behavior of presented control methods have been compared under transient states.
The first test was step change of referenced active power P ref from 1 kW
to 2 kW, and has been carried out with open DC-link voltage control loop
(Fig. 4.21 – 4.23). The active and reactive powers follow referenced values. For
all methods power responses are comparable to each other (see Fig. 4.24). In case
of VSF responses are about three times faster than CSF approach. However, it
is occupied by bipolar transistors switching and higher sampling frequency.

68 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
200
150
100
50
VSF-P-DPC
500
400
300
200
100
u P a
(c)
(a) u La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
0
−50
−100
−150
0
−100
−200
−300
−400
−200
−500
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
15
2500
10
2000
P Q
(d)
(b) i La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
5
1500
0
1000
−5
500
−10
0
−15
−500
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
200
150
100
50
HC-VSF-P-DPC
500
400
300
200
100
u P a
(c)
(a) u La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
0
−50
−100
−150
0
−100
−200
−300
−400
−200
−500
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
15
2500
10
2000
P Q
(d)
(b) i La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
5
1500
0
1000
−5
500
−10
0
−15
−500
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
Figure 4.21: Transient operation of VSF-P-DPC and HC-VSF-P-DPC power
step change from 1 kW to 2 kW: (a) line voltage u La [V], (b) line current i La [A],
(c) VSC input voltage u P a [V], (d) referenced and measured active P [W] and reactive
power Q [var]

4.8. SIMULATION RESULTS 69
200
150
100
50
FL-VSF-P-DPC
500
400
300
200
100
u P a
(c)
(a) u La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13
−500
0.135
15
2500
10
2000
P Q
(d)
(b) i La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
5
1500
0
1000
−5
500
−10
0
−15
−500
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
200
150
100
50
CSF-P-DPC
500
400
300
200
100
u P a
(c)
(a) u La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
0
−50
−100
−150
0
−100
−200
−300
−400
−200
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
−500
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
15
2500
10
2000
P Q
(d)
(b) i La
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
5
1500
0
1000
−5
500
−10
0
−15
−500
0.095 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135
Figure 4.22: Transient operation of FL-VSF-P-DPC and CSF-P-DPC power step
change from 1 kW to 2 kW: (a) line voltage u La [V], (b) line current i La [A],
(c) VSC input voltage u P a [V], (d) referenced and measured active P [W] and reactive
power Q [var]

70 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
Figures 4.25 – 4.27 present second test, which was step change of DC-link
voltage reference value U DCref from 300 V to 600 V. The DC-link voltage PI
controller has been tuned for each method according to the rules presented in
Section 3.4. On the basis of DC-link voltage error, PI controller assigns referenced
value of active power P ref Fig. 4.25 (d) – 4.27 (d). For all controls U DC overshoot
is between 3% – 5%. However, in case of VSF methods regulation time was 9 ms
shorter than in case of CSF what is caused by higher sampling frequency.
200
150
100
50
VF-CSF-P-DPC
0.8
0.6
0.4
0.2
500
400
300
200
100
u P a
(c)
(a) u La ψ La
0.195 0.2 0.205 0.21 0.215 0.22 0.225 0.23 0.235
0
0
0
−50
−100
−150
−100
−0.2
−200
−0.4
−300
−0.6
−400
−200
0.195 0.2 0.205 0.21 0.215 0.22 0.225 0.23 0.235
−0.8 −500
15
2500
10
2000
P Q
(d)
(b) i La
0.195 0.2 0.205 0.21 0.215 0.22 0.225 0.23 0.235
5
1500
0
1000
−5
500
−10
0
−15
−500
0.195 0.2 0.205 0.21 0.215 0.22 0.225 0.23 0.235
Figure 4.23: Transient operation of VF-CSF-P-DPC power step change from
1 kW to 2 kW: (a) line voltage u La [V] and estimated virtual flux ψ La [Wb],
(b) line current i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured
active P [W] and reactive power Q [var]

4.8. SIMULATION RESULTS 71
2500
2000
(a)
P Q
2500
2000
(b)
P Q
VSF-P-DPC
500
400
300
(c)
u P a
1500
1500
200
100
1000
1000
0
−100
500
500
−200
0
0
−300
−400
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
2500
2000
1500
1000
500
0
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
2500
2000
1500
1000
500
0
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
2500
FL-VSF-P-DPC
2000
1500
1000
500
0
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
2500
HC-VSF-P-DPC
2000
1500
1000
500
0
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
500
400
300
200
100
0
−100
−200
−300
−400
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
500
400
300
200
100
0
−100
−200
−300
−400
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
2500
2000
1500
1000
500
0
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
2500
CSF-P-DPC
2000
1500
1000
500
0
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
500
400
300
200
100
0
−100
−200
−300
−400
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
2500
2000
1500
1000
500
0
−500
0.2045 0.205 0.2055 0.206
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
2500
VF-CSF-P-DPC
2000
1500
1000
500
0
−500
0.2045 0.205 0.2055 0.206
−500
0.1044 0.1046 0.1048 0.105 0.1052 0.1054 0.1056 0.1058 0.106 0.1062
500
400
300
200
100
0
−100
−200
−300
−400
−500
0.2045 0.205 0.2055 0.206
Figure 4.24: Transient operation, step change of referenced active power P ref
from 1 kW to 2 kW in zoom: (a) referenced and measured active and reactive
power, (b) sampled referenced and measured active and reactive power, (c) VSC
input voltage u P a

72 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
650
600
VSF-P-DPC
200
u La i La 20 (b)
550
500
450
0
0
400
350
300
(a) U DC
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
−20
250
500
400
−200
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
8000
(c) u P a
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
7000
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
P Q
(d)
300
6000
200
100
5000
0
4000
−100
−200
−300
−400
−500
650
600
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
3000
2000
1000
0
HC-VSF-P-DPC
200
u La i La 20 (b)
550
500
450
0
0
400
350
300
(a) U DC
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
−20
250
500
400
−200
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
8000
7000
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
P Q
(d)
300
6000
200
100
(c) u P a
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
5000
0
4000
−100
−200
−300
−400
−500
3000
2000
1000
0
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
Figure 4.25: Transient operation of VSF-P-DPC and HC-VSF-P-DPC, step
change of referenced DC voltage U DCref from 300 V to 600 V: (a) referenced
and measured DC voltage U DC [V], (b) line voltage u La [V] and line current
i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured active P [W]
and reactive power Q [var]

4.8. SIMULATION RESULTS 73
650
600
FL-VSF-P-DPC
200
u La i La 20 (b)
550
500
450
0
0
400
350
300
−20
250
500
400
(a) U DC
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
−200
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
8000
(c) u P a
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
7000
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
P Q
(d)
300
6000
200
100
5000
0
4000
−100
−200
−300
−400
−500
650
600
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
3000
2000
1000
0
CSF-P-DPC
200
u La i La 20 (b)
550
500
450
0
0
400
350
300
(a) U DC
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
−20
250
500
400
−200
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
8000
(c) u P a
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
7000
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
P Q
(d)
300
6000
200
100
5000
0
4000
−100
−200
−300
−400
−500
3000
2000
1000
0
0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24
Figure 4.26: Transient operation of FL-VSF-P-DPC and CSF-P-DPC, step
change of referenced DC voltage U DCref from 300 V to 600 V: (a) referenced
and measured DC voltage U DC [V], (b) line voltage u La [V] and line current
i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured active P [W]
and reactive power Q [var]

74 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
650
600
VF-CSF-P-DPC
200
u La i La 20 (b)
(a) U DC
0.24 0.26 0.28 0.3 0.32 0.34
550
ψ La
500
450
0
0
400
350
300
−20
250
0.24 0.26 0.28 0.3 0.32 0.34
−200 0.24 0.26 0.28 0.3 0.32 0.34
500
8000
400
300
200
100
0
7000
6000
5000
4000
P Q
(d)
(c) u P a
0.24 0.25 0.26 0.27 0.28 0.29 0.3 0.31 0.32 0.33
−100
−200
3000
2000
−300
−400
−500
0.24 0.26 0.28 0.3 0.32 0.34
Figure 4.27: Transient operation of VF-CSF-P-DPC, step change of referenced
DC voltage U DCref from 300 V to 600 V: (a) referenced and measured DC voltage
U DC [V], (b) line voltage u La [V], estimated virtual flux ψ La [Wb] and line
current i La [A], (c) VSC input voltage u P a [V], (d) referenced and measured
active P [W]and reactive power Q [var]
1000
0
4.9 Summary
Principles of Model Predictive Control with Finite control Sets (FS-MPC) as well
as Virtual Flux approach for CSF-P-DPC have been presented in this Chapter.
In view of switching frequency, control methods have been divided into variable
(VSF) and constant switching frequency (CSF) approaches.
Control Method t set [µs] t r [µs]
VSF-P-DPC 300 125
HC-VSF-P-DPC 300 125
FL-VSF-P-DPC 300 200
CSF-P-DPC 300 250
VF-CSF-P-DPC 300 250
Table 4.8: Dynamic properties of P-DPC methods for P ref step change
The VSF based methods have following advantages:

4.9. SUMMARY 75
Control Method t set [ms] t r [ms] Overshot [%]
VSF-P-DPC 45 13 4.5
HC-VSF-P-DPC 43 13 5
FL-VSF-P-DPC 45 13 4.5
CSF-P-DPC 54 17 3.3
VF-CSF-P-DPC 54 17 3.3
Table 4.9: Dynamic properties of P-DPC methods for U DCref step change
• very high dynamics in transient states,
• simple and intuitive control scheme,
• control flexibility due to cost function approach.
However, the main disadvantages are:
• variable switching frequency,
• high sampling frequency requirement,
• sensitivity on system parameters mismatch (see Section 5.1),
• bipolar transistor switchings.
Some of above drawbacks can be eliminated by cost function modifications, like
in HC-VSF-P-DPC (Section 4.4), or FL-VSF-P-DPC (Section 4.5). Also, these
problems can be naturally omitted by fixing switching frequency, like in CSF-P-
DPC (Section 4.6).
The CSF approach has following advantages:
• constant switching frequency,
• very high dynamics in transient states (comparative to VSF methods),
• work with low sampling frequency ability,
• AC-side voltage sensorless operation,
• unipolar transistor switchings.
This method also is based on mathematical model of the system, and has following
drawbacks:
• more complicated control scheme,
• sensitivity to system parameters mismatch, which has been overcome by
introducing an on-line AC-side choke inductance estimation algorithm (see
Section 5.2).

76 CHAPTER 4. PREDICTIVE DIRECT POWER CONTROL
As it can be seen in Tab. 4.8 and Tab. 4.9, the dynamic of presented methods
is comparable. However, the CSF approach gives lower line current T HD factor
(see Tab. 4.7).

Chapter 5
Investigations of Control
Methods Performance
5.1 Robustness to Parameters Mismatch
Model Predictive Control bases on mathematical description of the grid and converter.
Algorithm works correct as long as the parameters used in model are
correct. In this Chapter influence of model parameters mismatch: choke inductance
L and resistance R, will be investigated for VSF and CSF control methods.
Furthermore, on-line choke inductance estimator will be presented. Also, selected
control methods will be tested under line voltage distortions. Investigations have
been performed on the basis of simulation models and experimental tests on
laboratory set-up as well.
5.1.1 Filter‘s Inductance Variations
Figure 5.1 shows average switching frequency F swAV in VSF-P-DPC method for
1 and 2 kW of load versus choke inductance value mismatch, used in predictive
model L C . Choke inductance mismatch ∆L is defined as:
∆L = L C − L
100[%] (5.1)
L
where L C is inductance used in control method, and L is real value. Figure 5.2
shows calculated power error ∆S defined as:
∆S =
√
(Pref − P ) 2 + (Q ref − Q) 2
√
P 2 ref + Q2 ref
(5.2)
versus ∆L whereas, Fig. 5.3 shows T HD i factor variation under L mismatch.
77

78 CHAPTER 5. INVESTIGATIONS OF CONTROL METHODS PERFORMANCE
5
4.5
4
3.5
F swAV
[kHz]
3
2.5
2
1.5
1
0.5
2 kW
1 kW
0
−100 −50 0 50 100
∆ L [%]
Figure 5.1: Average switching frequency F swAV versus line choke inductance
value mismatch ∆L in VSF-P-DPC
25
(a)
2 kW
1 kW
25
(b)
2 kW
1 kW
20
20
∆ S [%]
15
∆ S [%]
15
10
10
5
5
0
−100 −50 0 50 100
∆ L [%]
0
−100 −50 0 50 100
∆ L [%]
Figure 5.2: Power error ∆S versus line choke inductance value mismatch ∆L in:
(a) VSF-P-DPC, (b) CSF-P-DPC
(a)
(b)
15
2 kW
1 kW
15
2 kW
1 kW
10
10
THD i400
[%]
THD i400
[%]
5
5
0
−100 −50 0 50 100
∆ L [%]
0
−100 −50 0 50 100
∆ L [%]
Figure 5.3: Line current T HD i factor versus line choke inductance value mismatch
∆L in: (a) VSF-P-DPC, (b) CSF-P-DPC
When L C inductance, used in VSF-P-DPC predictive model, is too low (∆L < 0),
switching frequency decreases Fig. 5.1. The line current T HD i factor depends

5.1. ROBUSTNESS TO PARAMETERS MISMATCH 79
mainly on switching frequency and load value (Fig. 5.3), however large error in
power ∆S could be observed (Fig. 5.2). In opposite case, when the L C value is
too high (∆L > 0) the current ripples increase. It is caused by higher converter
voltage generated by predictive controller, which tries to reduce voltage drop on
oversized inductance L C . As it can be seen, in all cases CSF approach is more
robust to L mismatch than variable switching frequency.
5.1.2 Filter‘s Resistance Variations
Figure 5.4 shows average switching frequency F swAV in VSF-P-DPC method for
1 and 2 kW of load versus choke resistance value mismatch, used in predictive
model R C . Choke resistance mismatch ∆R is defined as:
∆R = R C − R
100[%] (5.3)
R
where R C is resistance used in predictive algorithm, and R is real value. Figure 5.5
shows calculated power error ∆S (eq. 5.2) versus ∆L whereas, Fig. 5.6 shows
T HD i factor variation under R mismatch.
5
4.5
4
3.5
F swAV
[kHz]
3
2.5
2
1.5
1
2 kW
1 kW
0.5
0
−100 −50 0 50 100
∆ R [%]
Figure 5.4: Average switching frequency F swAV versus line choke resistance value
mismatch ∆R in VSF-P-DPC
As it can be seen in Fig. 5.4 – 5.6, R mismatch does not have influence
on control performance. The voltage drop on choke resistance is much less than
voltage drop on choke inductance. Therefore, for further investigations R changes
will not be performed.

80 CHAPTER 5. INVESTIGATIONS OF CONTROL METHODS PERFORMANCE
15
(a)
15
(b)
2 kW
1 kW
10
10
∆ S [%]
∆ S [%]
5
5
2 kW
1 kW
0
−100 −50 0 50 100
∆ R [%]
0
−100 −50 0 50 100
∆ R [%]
Figure 5.5: Power error ∆S versus line choke resistance value mismatch ∆R in:
(a) VSF-P-DPC, (b) CSF-P-DPC
10
9
8
7
(a)
10
9
8
7
(b)
2 kW
1 kW
THD i400
[%]
6
5
4
THD i400
[%]
6
5
4
3
2
1
2 kW
1 kW
3
2
1
0
−100 −50 0 50 100
∆ R [%]
0
−100 −50 0 50 100
∆ R [%]
Figure 5.6: Line current T HD i factor versus line choke resistance value mismatch
∆R in: (a) VSF-P-DPC, (b) CSF-P-DPC
5.2 On-line Choke Inductance Estimator
As shown in Section 5.1.1 and 5.1.2 the P-DPC algorithm is mainly sensitive to
mismatch of AC-side filter inductance L. Therefore, on-line choke estimation has
been introduced to improve accuracy and stability of the control.
Based on the input quantities (DC-link voltage U DC and transistor duty cycles
S a , S b and S c ), the converter AC-side voltage estimator (3.37), (3.38) calculates
U P αβ components, and next transforms into dq coordinates. The transformation
can be performed either with line voltage U L (Fig. 5.7 (b)) or with virtual flux
space vector Ψ L (Fig. 5.8 (b)). The measured line current vector I L is delivered
to the block, which computes its module |I L |. Signals U P q (or U P d ) and |I L |
after filtering in low-pass filter (LPF) blocks are delivered to the divider, which
calculates the actual value of choke inductance L est (Fig. 5.7 (a) and Fig. 5.8 (a)).
The estimated value is further used in VF estimator and predictive model. Note
that inductance is calculated under assumption of unity power factor condition

Sabc UDC
UPαβ
UPαβ
Lest
Lest
UPdq
5.2. ON-LINE CHOKE INDUCTANCE ESTIMATOR 81
(a)
(b)
d
Estimator
UP
αβ
dq
|UPq|
LPF
R=0
ωL
αβ
|A|
γUL
|IL|
LPF
ω L
q
ULd
φ=0
ILdq
Figure 5.7: On-line choke inductance estimator related to γ UL angle: (a) estimator
scheme, (b) related vector diagram
ILαβ
UPq
from (5.4) or (5.5).
L est = |U P q|
ω L |I L |
(5.4)
(a)
Sabc UDC
Estimator
UP
αβ
dq
|UPd|
LPF
(b)
q
UPdq
γ
VF
Estimator
L
R=0
ULq
φ=0
ILdq
αβ
|A|
|IL|
LPF
Lαβ
ω L
ωL
Ψ Ld
d
Figure 5.8: On-line choke inductance estimator related to the γ ΨL
ILαβ
angle: (a) estimator
scheme, (b) related vector diagram
UPd
L est = |U P d|
ω L |I L |
(5.5)
However, for no-load operation, denominators in (5.4) and (5.5) are approaching
zero, and therefore, estimator has to be blocked.
To guarantee stable operation of the inductance estimator, second-order digital
filters (LPF) have been designed with very narrow band pass and high damping
factor.

82 CHAPTER 5. INVESTIGATIONS OF CONTROL METHODS PERFORMANCE
5.3 Experimental Verification of On-line Choke Inductance
Estimator
In order to verify operation of presented estimator an experimental tests have
been carried out. The estimator has been tested in VF-CSF-P-DPC control
method under conditions listed in Tab. 6.1. The performance of the developed online
AC-side choke inductance estimator has been shown in Fig. 5.9 and Fig. 5.10.
Fig. 5.9 (a) shows situation when the inductance L C used in predictive model is
90% lower as the real value. When the estimator is switched on, the estimated
inductance L est , after some dynamic process (about 2 s), achieves an actual value
of 10 mH.
P
(a)
(b)
Q
L est
u L
i L
L est
L C
L C
Figure 5.9: On-line choke estimator operation with −90% L C mismatch: (a) active
P power (500 W/div), reactive Q power (500 var/div), estimated inductance
value L est (2 mH/div), and inductance value used in control algorithm L C
(2 mH/div), (b) steady-state operation: line voltage u La (100 V/div), line current
i La (5 A/div), estimated inductance value L est (2 mH/div), and inductance
value used in control algorithm L C (2 mH/div)
Furthermore, this value is used in the predictive model. Note that before the
estimator is switched on, the predictive controller operates with a wrong value
of L C . As a result, the active and reactive powers have wrong values. However,
grid current ripples have low values as shown in Fig. 5.9 (b).
On the contrary, Fig. 5.10 (a) shows situation when inductance L C used in
predictive model is 200% higher than the actual value. In this case, the active
and reactive powers are estimated almost correctly, but the current ripples are
higher Fig. 5.10 (b).

5.4. LINE VOLTAGE DISTURBANCES 83
(a)
L C
L est
P
Q
(b)
u L
i L
L C
L est
Figure 5.10: On-line choke estimator operation with +200% L C mismatch: (a) inductance
value used in control algorithm L C (10 mH/div), estimated inductance
value L est (10 mH/div), active P power (500 W/div), and reactive Q power
(500 var/div), (b) steady-state operation: line voltage u La (100 V/div), line current
i La (5 A/div), inductance value used in control algorithm L C (10 mH/div),
and estimated inductance value L est (10 mH/div)
5.4 Line Voltage Disturbances
Predictive control methods are based on simplified mathematical models (see
Chapter 2). One of the assumptions is that, the line voltage is sinusoidal and balanced.
However, in real systems, line voltage can be temporary, or permanently
distorted by faults, short circuits, connections and disconnections of large loads,
nonlinear loads, etc.. Usually, it leads to present of line voltage harmonics
and voltage sags. Therefore, two control methods: CSF-P-DPC and VF-CSF-P-
DPC will be tested for some of these perturbations.
5.4.1 Influence of Line Voltage Harmonics
Line voltage is frequently distorted by higher harmonics what is caused by nonlinear
loads operation in the system. The converter control method should be
able to work under such a conditions. The predictive control methods have been
evaluated under line voltage disturbances listed in Tab. 5.1. Note that, line voltage
waveforms have been generated by controllable power supply, so converter
operation influence on supply voltage can be omitted.
As it can be seen in Fig. 5.11 – 5.14 in all cases, controls are able to operate
under distorted voltage. In CSF-P-DPC, control method tries to keep constant
values of instantaneous powers, which leads to generation of line current shape
waveforms, the same as line voltage. Of course line current T HD i factor, in such
a situation, is close to the line voltage T HD u .

84 CHAPTER 5. INVESTIGATIONS OF CONTROL METHODS PERFORMANCE
(a) (b) CSF-P-DPC
(c)
VF-CSF-P-DPC
Figure 5.11: Experimental steady state system operation under 5% of fifth harmonic
distorted line voltage: (a) line voltage u La , line current i La , (b) line voltage
u Lph−ph T HD u factor, (c) line current T HD i factor
(a) (b) CSF-P-DPC
(c)
VF-CSF-P-DPC
Figure 5.12: Experimental steady state system operation under 3% of fifth, 3% of
seventh and 1% of eleventh harmonics distorted line voltage: (a) line voltage u La ,
line current i La , (b) line voltage u Lph−ph T HD u factor, (c) line current T HD i
factor

5.4. LINE VOLTAGE DISTURBANCES 85
(a) (b) CSF-P-DPC
(c)
VF-CSF-P-DPC
Figure 5.13: Experimental steady state system operation under 12% of fifth
and 12% of seventh harmonics distorted line voltage: (a) line voltage u La , line
current i La , (b) line voltage u Lph−ph T HD u factor, (c) line current T HD i factor
(a) (b) CSF-P-DPC
(c)
VF-CSF-P-DPC
Figure 5.14: Experimental steady state system operation under 2% of seventh,
8.5% of eleventh and 1.3% of thirteenth harmonics distorted line voltage: (a) line
voltage u La , line current i La , (b) line voltage u Lph−ph T HD u factor, (c) line
current T HD i factor
In case of VF approach, control tries to keep constant values of instantaneous
powers, which are related to the fundamental frequency. Due to virtual flux
features (like natural filtering of higher harmonics) it is possible to achieve nearly
sinusoidal shape of the line currents, even under distorted line voltages.

86 CHAPTER 5. INVESTIGATIONS OF CONTROL METHODS PERFORMANCE
Line voltage CSF-P-DPC VF-CSF-P-DPC
distortion T HD u F sw 5 kHz F sw 5 kHz
5% (Fig. 5.11) 4.4 1.7
4.5% (Fig. 5.12) 5.7 1.6
17.4% (Fig. 5.13) 17.6 5.5
10.6% (Fig. 5.14) 7.1 3.6
Table 5.1: Summarized line current T HD i factors
5.4.2 Influence of Line Voltage Sags
Connections and disconnections of large loads, and short circuits in the system
can cause line voltage sags (sudden drop of line voltage value). In this subsection,
operation of CSF-P-DPC and VF approach under single and two phase voltage
sags will be investigated.
u La
u Lb
u Lc
CSF-P-DPC
(a)
VF-CSF-P-DPC
i La
(b)
u La
U DC
i La
P ref
Figure 5.15: Operation under single phase voltage sag: (a) line voltages u La , u Lb ,
u Lc (100 V/div), line current i La (10 A/div), (b) line voltage u La (200 V/div),
U DC voltage (100 V/div), line current i La (10 A/div), referenced active power
P ref (1 kW/div)
Figure 5.15 shows operation under single phase sag. As it can be seen, line

5.4. LINE VOLTAGE DISTURBANCES 87
CSF-P-DPC
(a)
VF-CSF-P-DPC
u La
u Lb
u Lc
i La
(b)
u La
U DC
i La
P ref
Figure 5.16: Operation under two phase voltage sag: (a) line voltages u La , u Lb ,
u Lc (100 V/div), line current i La (10 A/div), (b) line voltage u La (200 V/div),
U DC voltage (100 V/div), line current i La (10 A/div), referenced active power
P ref (1 kW/div)
25
(a)
25
(b)
20
THD ILa
THD ILb
THD ILc
20
CSF-P-DPC
THD ILa
THD ILb
THD ILc
THD [%]
15
10
CSF-P-DPC
THD [%]
15
10
5
VF-CSF-P-DPC
5
VF-CSF-P-DPC
0
50 60 70 80 90 100
U [%] L
0
50 60 70 80 90 100
U [%] L
Figure 5.17: Current T HD factor in presence of: (a) single phase voltage sag,
(b) two phase voltage sag
voltage sag u La , causes DC-link voltage drop U DC . Next, DC-link voltage controller,
trying to keep constant U DC , assigns higher value of active power P ref

88 CHAPTER 5. INVESTIGATIONS OF CONTROL METHODS PERFORMANCE
u La
u Lb
u Lc
(a)
VF-CSF-P-DPC
i La
(b)
u La
U DC
i La
P ref
Figure 5.18: Operation under two phase voltage sag: (a) line voltages u La , u Lb ,
u Lc (100 V/div), line current i La (10 A/div), (b) line voltage u La (200 V/div),
U DC voltage (100 V/div), line current i La (10 A/div), referenced active power
P ref (1 kW/div)
(see Fig. 4.11), which increases line current value. For both controls, the operational
limit is set to the maximum allowable converter input current. When
the current limit is exceeded, the converter is being shut down. The converter
operates in similar way in case of two phase voltage sag.
Figure 5.17 shows line current T HD factor in presence of single and two phase
voltage sags. In both cases, the VF-CSF-P-DPC is more robust to disturbances,
than control with direct line voltage measurements.

Chapter 6
Experimental Study
Experimental studies were performed on the laboratory set-up, which consists of
an AC/DC voltage source converter (Danfoss VLT 5005 5 kVA), AC-side choke,
and control system implemented on dSPACE 1103 board. Main data of the power
circuit are summarized in Tab. 6.1. As a supply, a programmable power simulator
has been used, which guarantees sinusoidal voltage waveforms. Note that all tests
have been carried out with reduced line voltage amplitude.
Quantity
Value
Fundamental Frequency F L [Hz] 50
Supply Voltage u L(RMS) [V] 120
VSC max. current i L(RMS) [A] 8
Input Filter Inductance L [mH] 10
Input Filter Resistance R [mΩ] 100
DC-link Capacitance C [µF] 470
Table 6.1: Main data of laboratory set-up
6.1 Steady State Operation
Presented control methods have been divided into two main groups: with variable
(like: ST-DPC and VSF), and constant or fixed switching frequency (like: DPC-
SVM and CSF), and further compared under steady state operation. To avoid
DC voltage control loop influence, all tests have been carried out with open loop,
and under unity power factor condition Q ref = 0. The reference value of active
power P ref has been set to 2 kW, and the DC side load resistance has been set to
100 Ω. Table 6.2 summarizes sampling frequencies F s , and achieved line current
T HD factors for investigated methods.
89

90 CHAPTER 6. EXPERIMENTAL STUDY
(a) ST-DPC (b)
u La
i La
u P a
P
Q
VSF-P-DPC
HC-VSF-P-DPC
FL-VSF-P-DPC
Figure 6.1: Experimental steady state operation of: ST-DPC, VSF-P-DPC, HC-
VSF-P-DPC and FL-VSF-P-DPC under 2 kW of load.
From the top: (a) line voltage u La (200 V/div), line current i La (10 A/div), VSC
input voltage u P a (200 V/div), (b) referenced P ref and measured P active powers
(500 W/div), and referenced Q ref and measured Q reactive powers (500 var/div)

6.1. STEADY STATE OPERATION 91
(a)
DPC-SVM (b)
u La
i La
u P a
P
Q
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.2: Experimental steady state operation of: DPC-SVM, CSF-P-DPC
and VF-CSF-P-DPC under 2 kW of load. From the top: (a) line voltage
u La (200 V/div), line current i La (10 A/div), VSC input voltage u P a (200 V/div),
(b) referenced P ref and measured P active powers (500 W/div), and referenced
Q ref and measured Q reactive powers (500 var/div)

92 CHAPTER 6. EXPERIMENTAL STUDY
(a) (b) ST-DPC (c)
VSF-P-DPC
HC-VSF-P-DPC
FL-VSF-P-DPC
Figure 6.3: Line current T HD factors and spectrum in: ST-DPC, VSF-P-DPC,
HC-VSF-P-DPC and FL-VSF-P-DPC, (a) T HD factor measured up to 2.5 kHz,
(b) harmonics spectrum up to 2.5 kHz, (c) harmonics spectrum up to 12.5 kHz
Note that ST-DPC and predictive control methods with variable switching
frequency require higher sampling frequency than DPC-SVM and CSF methods.
Figures 6.1 – 6.2 show steady state operation. All controls fulfill unity power
factor condition, and line current i La is in phase with line voltage u la . The
lowest active and reactive powers variations have been achieved by DPC-SVM,
CSF-P-DPC and VF-CSF-P-DPC.
Figures 6.3 (a) – 6.4 (a) show line current T HD factors for tested methods,
as well as line current spectrum up to 2.5 kHz (Fig. 6.3 (b) – 6.4 (b)) and up
to 12.5 kHz (Fig. 6.3 (c) – 6.4 (c)). As it can be seen the lowest T HD factors
have been achieved by CFS-P-DPC and VF-CSF-P-DPC methods.

6.1. STEADY STATE OPERATION 93
Control F sw F swAV F swMax F s T HD
Method per cycle [kHz] [kHz] [kHz] [%]
ST-DPC var. 3.6 40 40 3.6
VSF-P-DPC var. 3.7 20 20 2.7
HC-VSF-P-DPC var. 3.7 20 20 5.6
FL-VSF-P-DPC var. 3 20 20 4.4
DPC-SVM fixed 5 5 5 2.1
CSF-P-DPC fixed 5 7.5 7.5 0.7
VF-CSF-P-DPC fixed 5 7.5 7.5 0.8
Table 6.2: Sampling and switching frequencies of tested control methods and
achieved T HD factors
(a) (b) DPC-SVM (c)
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.4: Line current T HD factors and spectrum in: DPC-SVM, CSF-P-DPC
and VF-CSF-P-DPC, (a) T HD factor measured up to 2.5 kHz, (b) harmonics
spectrum up to 2.5 kHz, (c) harmonics spectrum up to 12.5 kHz
For fixed switching frequency approaches (see Tab. 6.2) line current spectrum
is concentrated around switching frequency (Fig. 6.4 (c)). In other cases the
spectrum is spread over wide range of frequencies. The exception is HC-VSF-P-
DPC, which allows to concentrate current spectrum within desired frequency (in
presented case around 4 kHz, Fig. 6.3 (c)). However, it generates also low order

94 CHAPTER 6. EXPERIMENTAL STUDY
harmonics what results in the highest line current T HD factor.
6.2 Transient Operation
Behavior of presented control methods have been compared under transient states.
The first test was step change of referenced active power P ref from 1 kW
to 2 kW. To fully show control methods performance on active power step change,
test has been carried out with open DC-link voltage control loop. Figure 6.5
and Fig. 6.6 show experimental results.
The step responses of ST-DPC and VSF methods are comparable to each
other, see Fig. 6.7. However, its about one and half times faster than DPC-SVM
and CSF approaches, see Fig. 6.8. Higher transient response is achieved by high
sampling frequency, and ability of immediately applying opposite voltage vectors
(VSF-P-DPC and HC-VSF-P-DPC), as it has been shown in Fig. 6.7 (b).
In case of ST-DPC, control method does not allow for opposite vectors application
(refer to Tab. 3.1, and Tab. 3.2), however high sampling frequency (40 kHz)
guarantees fast response.
Because of modulator in DPC-SVM, opposite voltage vector applications are
not allowed. Also, in CSF-P-DPC and VF-CSF-P-DPC selection of voltage vectors
is limited by switching tables (see Tab. 4.4 and Tab. 4.5), however lack of PI
controller in internal control loops give fast response without overshot.

6.2. TRANSIENT OPERATION 95
(a) ST-DPC (b)
u La
i La
u P a
P
Q
VSF-P-DPC
HC-VSF-P-DPC
FL-VSF-P-DPC
Figure 6.5: Experimental transient state of: ST-DPC, VSF-P-DPC, HC-VSF-P-
DPC and FL-VSF-P-DPC, step change of referenced active power P ref from
1 to 2 kW. From the top: (a) line voltage u La (200 V/div), line current
i La (10 A/div), VSC input voltage u P a (200 V/div), (b) referenced P ref and measured
P active powers (500 W/div), and referenced Q ref and measured Q reactive
powers (500 var/div)

96 CHAPTER 6. EXPERIMENTAL STUDY
(a)
DPC-SVM (b)
u La
i La
u P a
P
Q
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.6: Experimental transient state of: DPC-SVM, CSF-P-DPC and VF-
CSF-P-DPC, step change of referenced active power P ref from 1 to 2 kW. From
the top: (a) line voltage u La (200 V/div), line current i La (10 A/div), VSC input
voltage u P a (200 V/div), (b) referenced P ref and measured P active powers
(500 W/div), and referenced Q ref and measured Q reactive powers (500 var/div)

6.2. TRANSIENT OPERATION 97
(a)
ST-DPC
(b)
P
u P a
Q
VSF-P-DPC
HC-VSF-P-DPC
FL-VSF-P-DPC
Figure 6.7: Experimental transient state of: ST-DPC, VSF-P-DPC, HC-VSF-
P-DPC and FL-VSF-P-DPC, step change of referenced active power P ref from
1 to 2 kW. From the top: (a) referenced P ref and measured P active powers
(500 W/div), and referenced Q ref and measured Q reactive powers (500 var/div)
(b) VSC input voltage u P a (200 V/div)

98 CHAPTER 6. EXPERIMENTAL STUDY
(a)
DPC-SVM
(b)
P
u P a
Q
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.8: Experimental transient state of: DPC-SVM, CSF-P-DPC and VF-
CSF-P-DPC, step change of referenced active power P ref from 1 to 2 kW. From
the top: (a) referenced P ref and measured P active powers (500 W/div), and referenced
Q ref and measured Q reactive powers (500 var/div) (b) VSC input voltage
u P a (200 V/div)
Figures 6.9 – 6.10 present second test, which was step change of DC-link
voltage reference value U DCref from 300 V to 600 V. The DC-link voltage PI
controller has been tuned for each method according to the rules presented in
Section 3.4. For all controls U DC overshoot is between 3% – 5%, and regulation
time is between 30 – 40 ms. Note that DC-link controller output has been limited
to 3.5 kW in order to avoid converter shot down caused by over current protection.

6.2. TRANSIENT OPERATION 99
(a) ST-DPC (b)
u L
i L
U DC
P
Q
VSF-P-DPC
HC-VSF-P-DPC
FL-VSF-P-DPC
Figure 6.9: Experimental step change of referenced DC voltage U DCref from
300 to 600 V. From the top: (a) referenced U DCref and measured U DC voltage
(100 V/div), line voltage u La (200 V/div), line current i La (10 A/div),
(b) referenced P ref and measured P active powers (1 kW/div), and referenced
Q ref and measured Q reactive powers (1 kvar/div)

100 CHAPTER 6. EXPERIMENTAL STUDY
(a) DPC-SVM (b)
U DC
i L
P
Q
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.10: Experimental step change of referenced DC voltage U DCref from
300 to 600 V. From the top: (a) referenced U DCref and measured U DC voltage
(100 V/div), line voltage u La (200 V/div), line current i La (10 A/div),
(b) referenced P ref and measured P active powers (1 kW/div), and referenced
Q ref and measured Q reactive powers (1 kvar/div)

6.3. OPERATION WITH LOW SWITCHING FREQUENCY 101
6.3 Operation with Low Switching Frequency
The same experimental investigations have been repeated with reduced switching
frequency for selected control methods: DPC-SVM, CSF-P-DPC and VF-CSF-
P-DPC, under conditions listed in Tab. 6.1 and Tab. 6.3.
Control Method F sw F swAV F swMax F s T HD
per cycle [kHz] [kHz] [kHz] [%]
DPC-SVM fixed 2 2 2 4.2
CSF-P-DPC fixed 2 2 3 3.3
VF-CSF-P-DPC fixed 2 2 3 3.2
Table 6.3: Sampling and switching frequencies of tested control methods
(a) (b) DPC-SVM (c)
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.11: Line current T HD factors and spectrum in DPC-SVM, CSF-P-DPC
and VF-CSF-P-DPC: (a) T HD factor measured up to 2.5 kHz, (b) harmonics
spectrum up to 2.5 kHz, (c) harmonics spectrum up to 12.5 kHz
Figure 6.12 shows steady state operation. In all cases oscillations of active and
reactive powers can be observed (Fig. 6.12 (b)), however its amplitude and period
are lower in predictive methods. It corresponds to line current T HD factor.

102 CHAPTER 6. EXPERIMENTAL STUDY
(a)
DPC-SVM (b)
u La
i La
u P a
P
Q
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.12: Experimental steady-state operation of DPC-SVM, CSF-P-DPC
and VF-CSF-P-DPC under 2 kW load. From the top: (a) line voltage
u La (200 V/div), line current i La (10 A/div), VSC input voltage u P a (200 V/div),
(b) referenced P ref and measured P active powers (500 W/div), and referenced
Q ref and measured Q reactive powers (500 var/div)

6.3. OPERATION WITH LOW SWITCHING FREQUENCY 103
(a)
DPC-SVM (b)
u La
i La
u P a
P
Q
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.13: Experimental transient state of DPC-SVM, CSF-P-DPC and VF-
CSF-P-DPC; step change of referenced active power P ref from 1 to 2 kW. From
the top: (a) line voltage u La (200 V/div), line current i La (10 A/div), VSC input
voltage u P a (200 V/div), (b) referenced P ref and measured P active powers
(500 W/div), and referenced Q ref and measured Q reactive powers (500 var/div)

104 CHAPTER 6. EXPERIMENTAL STUDY
(a)
DPC-SVM
(b)
u P a
P
Q
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.14: Experimental transient state of DPC-SVM, CSF-P-DPC and VF-
CSF-P-DPC; step change of referenced active power P ref from 1 to 2 kW. From
the top: (a) line voltage u La (200 V/div), line current i La (10 A/div), VSC input
voltage u P a (200 V/div), (b) referenced P ref and measured P active powers
(500 W/div), and referenced Q ref and measured Q reactive powers (500 var/div)

6.3. OPERATION WITH LOW SWITCHING FREQUENCY 105
(a)
(b) DPC-SVM (c)
U DC
P
Q
CSF-P-DPC
VF-CSF-P-DPC
Figure 6.15: Experimental step change of referenced DC voltage U DCref from
300 to 600 V.
From the top: (a) referenced U DCref and measured U DC voltage (100 V/div),
(b) line voltage u La (200 V/div), line current i La (5 A/div), VSC input voltage
u P a (200 V/div), (c) referenced P ref and measured P active powers (1 kW/div),
and referenced Q ref and measured Q reactive powers (1 kvar/div)
The lowest value has been achieved by VF-CSF-P-DPC method (see Fig. 6.11
and Tab. 6.3). Another test was step change of referenced active power P ref
from 1 kW to 2 kW, and has been carried out with open DC-link voltage control
loop (Fig. 6.13). As it can be seen in Fig. 6.14 the predictive control methods
get faster responses, with smaller overshot. Note that, in all cases no opposite
voltage vector application occurs.
Finally, Fig. 6.15 shows control methods performance on step change of referenced
DC-link voltage U DCref from 300 V to 600 V.

106 CHAPTER 6. EXPERIMENTAL STUDY
6.4 Summary
In order to verify the behavior of the predictive control methods several experimental
test have been carried out. This Chapter evaluates both VSF and CSF
predictive methods, along well known ST-DPC and DPC-SVM. Additionally, for
selected methods, a low switching frequency operation have been investigated.
Control Method t set [µs] t r [µs] t r2 [µs]
ST-DPC 600 190 400
VSF-P-DPC 420 390 400
HC-VSF-P-DPC 600 100 300
FL-VSF-P-DPC 600 100 300
DPC-SVM 1000 600 500
CSF-P-DPC 600 260 450
VF-CSF-P-DPC 600 260 450
Table 6.4: Summarized dynamic properties of control methods for P ref step
change
Control Method t set [ms] t r [ms] Overshot [%]
ST-DPC 50 25 5
VSF-P-DPC 50 25 5.5
HC-VSF-P-DPC 50 25 3
HC-VSF-P-DPC 50 25 3
DPC-SVM 55 30 4
CSF-P-DPC 50 35 3.5
VF-CSF-P-DPC 50 35 3.5
Table 6.5: Dynamic properties of control methods for U DCref step change
Control Method t set [µs] t r [µs]
DPC-SVM 4000 2000
CSF-P-DPC 1500 1000
VF-CSF-P-DPC 1500 1000
Table 6.6: Summarized dynamic properties of control methods for P ref step
change with low switching frequency
The Predictive methods have very good results both in steady-state (see
Tab. 6.2) and transients (see Tab. 6.4 and Tab. 6.5). The comparative study
between ST-DPC and variable switching frequency predictive methods establish
that for comparable switching frequency VSF-P-DPC has the same dynamic features,
but it gets lower T HD factor (1% of improvement).

6.4. SUMMARY 107
Control Method t set [ms] t r [ms] Overshot [%]
DPC-SVM 90 40 4
CSF-P-DPC 55 35 3.5
VF-CSF-P-DPC 55 35 3.5
Table 6.7: Dynamic properties of control methods for U DCref step change with
low switching frequency
In a similar way, a comparison between DPC-SVM and constant switching
frequency predictive methods have been done. It has been shown that both
predictive methods; CSF-P-DPC and VF-CSF-P-DPC have improved dynamic
as well as T HD factor is decreased in relation to DPC-SVM (1.4% improvement).
The same conclusion can be noted in case of low switching (sampling) frequency
operation (see Tab. 6.6, and Tab. 6.7). The P ref step response is about two times
faster and T HD factor in steady state is reduced by 1%.

Chapter 7
Summary and Final Conclusions
This thesis has been devoted to the research of predictive control methods for
Voltage Source Converter, which could be competitive to the well known controls
as: Voltage Oriented Control - VOC, Switching Table based Direct Power Control
- ST-DPC and Direct Power Control with Space Vector Modulator - DPC-SVM.
The predictive control theory is being used in many fields of science. Also applications
in power electronics can be found, however its number is still low. Therefore,
thesis proposes several Predictive Direct Power Control (P-DPC) methods, a new
control approaches where the well known direct power control is combined with
a predictive selection of a voltage vectors, obtaining both high transient dynamic
and low line current T HD factors, even for low switching frequency.
Author has concentrated on Finite Set Model Predictive Control - FS-MPC,
which meets very well discrete nature of power converters. In view of switching
frequency the FS-MPC methods can be divided into two groups:
• Variable Switching Frequency (VSF) - Section 4.3 – 4.5,
• Constant Switching Frequency (CSF) - Section 4.6 and 4.7.
In order to present those control methods, several analytical and simulation
based approaches, as well as experimental validations in a line connected,
two-level VSC have been carried out. Taking into consideration advantages of
constant switching frequency for converter operation, further work has been focused
on CSF approach giving Virtual Flux based Constant Switching Frequency
Direct Power Control VF-CSF-P-DPC. From the obtained results of comparative
study, the VF-CSF-P-DPC has following advantages:
• high dynamic power control performance (lack of PI controllers),
• lower line current T HD factor even for low switching frequency,
109

110 CHAPTER 7. SUMMARY AND FINAL CONCLUSIONS
• lower line current T HD factor even for distorted line voltage,
• lack of PWM modulation blocks,
• constant switching frequency (easy design of EMI filter),
• operation without AC-side voltage sensors, due to used VF-based approach,
• lower sampling frequency (as conventional DPC and P-DPC with variable
switching frequency),
• less noisy estimated active and reactive power signals (VF), easy DSP implementation,
• robust to input choke inductance mismatch, due to on-line estimator.
The experimental results show very good properties under different operation
conditions both in steady and transient states. The comparison between known
DPC-based strategies and proposed approach establishes that the P-DPC is faster
in active power reference transients and achieves lower line current T HD factor,
even for distorted and unbalanced line voltage. The performance comparison
shows that the presented approaches are an attractive option to standard ST-
DPC or DPC-SVM techniques for voltage source converters.
In the author’s opinion the thesis formulated in Chapter 1 has been proved.
The predictive control methods for VSC, provides very high dynamics of active
and reactive power control, even for low switching frequency.

Bibliography
[1] M. P. Kazmierkowski, R. Krishnan, and F. Blaabjerg, Control in Power Electronics.
Academic Press - USA, 2002. [cited at p. 1, 2, 17, 42]
[2] M. Lissere, P. Rodriguez, J. Guerrero, and R. Teodorescu, “Power electronics
for pv energy systems integration,” 39th IEEE PESC, 15–19 June 2008, tutorial.
[cited at p. 1, 2]
[3] M. P. Kazmierkowski, M. Jasinski, and H. C. Sorensen, “Ocean wave energy
converters-wave dragon mw,” Przeglad Elektrotechniczny, vol. 84, no. 2, pp. 8–13,
2008. [cited at p. 1, 2]
[4] M. Malinowski and M. P. Kazmierkowski, “Simple direct power control of threephase
pwm rectifier using space vector modulation - a comparative study,” EPE-
Journal, vol. 13, no. 2, pp. 28–34, Sept 2003. [cited at p. 1, 2, 17, 28]
[5] B. T. Ooi, J. W. Dixon, A. B. Kulkarni, and M. Nishimoto, “An integrated ac drive
system using a controlled-current pwm rectifier/inverter link,” in Proc. of PESC
1986, pp. 494–501, 1986. [cited at p. 1, 2]
[6] T. Ohnishi, “Three-phase pwm converter/inverter by means of instantaneous active
and reactive power control,” in Proc. of IEEE-IECON, vol. 1, pp. 819–824, 28 Oct –
1 Nov 1991. [cited at p. 1, 2, 21]
[7] M. Malinowski, M. P. Kazmierkowski, S. Hansen, F. Blaabjerg, and G. D. Marques,
“Virtual flux-based direct power control of three-phase pwm rectifiers,” IEEE Trans.
on Industry Applications, vol. 37, no. 4, pp. 1019–1027, July/Aug 2001. [cited at p. 1,
28]
[8] M. P. Kazmierkowski and L. Malesani, “Current control techniques for three-phase
voltage-source pwm converters: A survey,” IEEE Trans. on Industrial Electronics,
vol. 45, no. 5, pp. 691–703, Oct 1998. [cited at p. 2]
[9] M. Malinowski, “Sensorless control strategies for three - phase pwm rectifiers,” Ph.D.
dissertation, Warsaw Univ. of Technology, Warsaw, Poland, 2001. [cited at p. 2, 17,
18, 24, 25]
[10] J. L. Duarte, A. V. Zwam, C. Wijnands, and A. Vandenput, “Reference frames fit
for controlling pwm rectifiers,” IEEE Trans. on Industrial Electronics, vol. 46, no. 3,
pp. 628–630, June 1999. [cited at p. 2, 17, 24, 28]
111

112 BIBLIOGRAPHY
[11] K. Hyosung and H. Akagi, “The instantaneous power theory on the rotating p-qr
reference frames,” in Proc. of PEDS’99, vol. 1, pp. 422–427, 27–29 July 1999.
[cited at p. 2]
[12] M. Malinowski, “Adaptive space vector modulation for three-phase two-level pwm
rectifiers/inverters,” Archives of Electrical Engineering, vol. L1, no. 3, pp. 281–295,
2002. [cited at p. 2]
[13] M. Malinowski, M. Jasinski, and M. P. Kazmierkowski, “Simple direct power control
of three-phase pwm rectifier using space-vector modulation (dpc-svm),” IEEE
Trans. on Industrial Electronics, vol. 51, no. 2, pp. 447–454, April 2004. [cited at p. 2,
25]
[14] J. Holtz, “Pulsewidth modulation for electronic power conversion,” in Proc. of the
IEEE, vol. 82, no. 8, pp. 1194–1214, Aug 1994. [cited at p. 2]
[15] J. Holtz and S. Stadtfeld, “A predictive controller for the stator current vector of
ac machines fed from a switched voltage source,” in Proc. of IPEC, pp. 1665–1675,
1983. [cited at p. 3]
[16] M. Depenbrock, “Direct self-control (dsc) of inverter-fed induction machine,” IEEE
Trans. on Power Electronics, vol. 3, no. 4, pp. 420–429, Oct 1988. [cited at p. 3]
[17] E. Flach, R. Hoffmann, and P. Mutschler, “Direct mean torque control of an induction
motor,” in Proc. of EPE 97, vol. 3, pp. 672—-677, 8–10 Sept 1997. [cited at p. 3]
[18] I. Takahashi and T. Noguchi, “A new quick response and high efficiency control
strategy of an induction motor,” in Proc. of IEEE-IAS 2005, pp. 1665–1675, 1985.
[cited at p. 3]
[19] O. Kukrer, “Discrete-time current control of voltage-fed three-phase pwm inverters,”
IEEE Trans. on Power Electronics, vol. 11, no. 2, pp. 260–269, March 1996.
[cited at p. 4]
[20] H. Le-Huy, K. Slimani, and P. Viarouge, “Analysis and implementation of a real-time
predictive current controller for permanent-magnet synchronous servo drives,” IEEE
Trans. on Industrial Electronics, vol. 41, no. 1, pp. 110–117, Feb 1994. [cited at p. 4]
[21] H.-T. Moon, H.-S. Kim, and M.-J. Youn, “A discrete-time predictive current control
for pmsm,” IEEE Trans. on Power Electronics, vol. 18, no. 1, pp. 464–472, Jan 2003.
[cited at p. 4]
[22] L. Springob and J. Holtz, “High-bandwidth current control for torque ripple compensation
in pm synchronous machines,” IEEE Trans. on Industrial Electronics,
vol. 45, no. 5, pp. 713–721, Oct 1998. [cited at p. 4]
[23] J. Chen, A. Prodic, R. W. Erickson, and D. Maksimovic, “Predictive digital current
programmed control,” IEEE Trans. on Power Electronics, vol. 18, no. 1, pp. 411–
419, Jan 2003. [cited at p. 4]
[24] R. E. Betz, B. J. Cook, and S. J. Henriksen, “A digital current controller for three
phase voltage source inverters,” in Proc. of IEEE-IAS 1997, vol. 1, pp. 722–729,
5–9 Oct 1997. [cited at p. 4]

BIBLIOGRAPHY 113
[25] G. Bode, P. C. Loh, M. J. Newman, and D. G. Holmes, “An improved robust
predictive current regulation algorithm,” IEEE Trans. on Industry Applications,
vol. 41, no. 6, pp. 1720–1733, Nov 2005. [cited at p. 4]
[26] S.-M. Yang and C.-H. Lee, “A deadbeat current controller for field oriented induction
motor drives,” IEEE Trans. on Power Electronics, vol. 17, no. 5, pp. 772–778, Sept
2002. [cited at p. 4]
[27] H. Abu-Rub, J. Guzinski, Z. Krzeminski, and H. A. Toliyat, “Predictive current
control of voltage source inverters,” IEEE Trans. on Industrial Electronics, vol. 51,
no. 3, pp. 585–593, June 2004. [cited at p. 4]
[28] Q. Zeng and L. Chang, “An advanced svpwm-based predictive current controller for
three-phase inverters in distributed generation systems,” IEEE Trans. on Industrial
Electronics, vol. 55, no. 3, pp. 1235–1246, March 2008. [cited at p. 4, 42]
[29] L. Malesani, P. Mattavelli, and S. Buso, “Robust dead-beat current control for pwm
rectifiers and active filters,” IEEE Trans. on Industry Applications, vol. 35, no. 3,
pp. 613–620, May/June 1999. [cited at p. 4, 42]
[30] Y. Nishida, O. Miyashita, T. Haneyoshi, H. Tomita, and A. Maeda, “A predictive
instantaneous-current pwm controlled rectifier with ac-side harmonic current reduction,”
IEEE Trans. on Industrial Electronics, vol. 44, no. 3, pp. 337–343, June 1997.
[cited at p. 4]
[31] S.-G. Jeong and M.-H. Woo, “Dsp-based active power filter with predictive current
control,” IEEE Trans. on Industrial Electronics, vol. 44, no. 3, pp. 329–336, June
1997. [cited at p. 4]
[32] J. Mossoba and P. Lehn, “A controller architecture for high bandwidth active power
filters,” IEEE Trans. on Power Electronics, vol. 18, no. 1, pp. 317–325, Jan 2003.
[cited at p. 4]
[33] W. Zhang, G. Feng, Y.-F. Liu, and B. Wu, “Analysis and implementation of a new
pfc digital control method,” in Proc. of PESC 2003, vol. 1, pp. 335–340, 15–19 June
2003. [cited at p. 4]
[34] P. Mattavelli, G. Spiazzi, and P. Tenti, “Predictive digital control of power factor
preregulators using disturbance observer for input voltage estimation,” in Proc. of
PESC 2003, vol. 4, pp. 1703–1708, 15–19 June 2003. [cited at p. 4]
[35] ——, “Predictive digital control of power factor preregulators with input voltage
estimation using disturbance observers,” IEEE Trans. on Power Electronics, vol. 20,
no. 1, pp. 140–147, Jan 2005. [cited at p. 4]
[36] S. Buso, S. Fasolo, and P. Mattavelli, “Uninterruptible power supply multi loop employing
digital predictive voltage and current regulators,” IEEE Trans. on Industry
Applications, vol. 37, no. 6, pp. 1846–1854, Nov/Dec 2001. [cited at p. 4]
[37] P. Mattavelli, “An improved deadbeat control for ups using disturbance observers,”
IEEE Trans. on Industrial Electronics, vol. 52, no. 1, pp. 206–212, Feb 2005.
[cited at p. 4]

114 BIBLIOGRAPHY
[38] A. Nasiri, “Digital control of three-phase series-parallel uninterruptible power supply
systems,” IEEE Trans. on Power Electronics, vol. 22, no. 4, pp. 1116–1127, July
2007. [cited at p. 4]
[39] S. Saggini, W. Stefanutti, E. Tedeschi, and P. Mattavelli, “Digital deadbeat control
tuning for dc-dc converters using error correlation,” IEEE Trans. on Power
Electronics, vol. 22, no. 4, pp. 1566–1570, July 2007. [cited at p. 4]
[40] P. Correa, M. Pacas, and J. Rodriguez, “Predictive torque control for inverter-fed
induction machines,” IEEE Trans. on Industrial Electronics, vol. 54, no. 2, pp.
1073–1079, April 2007. [cited at p. 4]
[41] E. F. Camacho and C. Bordons, Model Predictive Control. Springer-Verlag, 1999.
[cited at p. 4]
[42] J. M. Maciejowski, Predictive Control with Constraints. Prentice Hall, 2002.
[cited at p. 4]
[43] G. C. Goodwin, M. M. Seron, and J. A. D. Dona, Constrained Control & Estimation
– An Optimization Perspective. Springer Verlag, 2005. [cited at p. 4]
[44] S. J. Qin and T. A. Badgwell, “A survey of industrial model predictive control
technology,” Contr. Eng. Pract., vol. 11, pp. 733–764, 2003. [cited at p. 4]
[45] D. Q. Mayne, J. B. Rawlings, C. V. Rao, and P. O. M. Scokaert, “Constrained
model predictive control: Optimality and stability,” Automatica, vol. 36, no. 6, pp.
789–814, June 2000. [cited at p. 4]
[46] C. E. Garcia, D. M. Prett, and M. Morari, “Model predictive control: Theory and
practice – a survey,” Automatica, vol. 25, no. 3, pp. 335–348, June 1989. [cited at p. 4]
[47] P. Cortes, M. P. Kazmierkowski, R. M. Kennel, D. E. Quevedo, and J. Rodriguez,
“Predictive control in power electronics and drives,” IEEE Trans. on Industrial
Electronics, vol. 55, no. 12, pp. 4312–4324, Dec 2008. [cited at p. 4, 42]
[48] P. Antoniewicz and M. P. Kazmierkowski, “Virtual flux based predictive direct
power control of ac/dc converters with on-line inductance estimation,” IEEE Trans.
on Industrial Electronics, vol. 55, no. 12, pp. 4381–4390, Dec 2008. [cited at p. 4, 50,
58]
[49] M. Jasinski, “Direct power and torque control of ac/dc/ac converter–fed induction
motor drives,” Ph.D. dissertation, Warsaw Univ. of Technology, Warsaw, Poland,
2005. [cited at p. 18, 25]
[50] T. Noguchi, H. Tomiki, S. Kondo, and I. Takahashi, “Direct power control of pwm
converter without power-source voltage sensors,” IEEE Trans. Industry Applications,
vol. 34, no. 3, pp. 473–479, May/June 1998. [cited at p. 24]
[51] V. Manninen, “Application of direct torque control modulation technology to a line
converter,” in Proc. of EPE, no. 1, pp. 292–296, 1995. [cited at p. 24]
[52] P. Antoniewicz and M. P. Kazmierkowski, “Virtual flux predictive direct power
control of three phase ac/dc converter,” in Proc. of IEEE-HSI 2008, pp. 510–515,
25–27 May 2008. [cited at p. 28, 58]

BIBLIOGRAPHY 115
[53] J. Rodriguez, J. Pontt, C. A. Silva, P. Correa, P. Lezana, P. Cortes, and U. Ammann,
“Predictive current control of a voltage source inverter,” IEEE Trans. on Industrial
Electronics, vol. 54, no. 1, pp. 495–503, Jan 2007. [cited at p. 42]
[54] P. Cortes, J. Rodriguez, P. Antoniewicz, and M. P. Kazmierkowski, “Direct power
control of an afe using predictive control,” IEEE Trans. on Power Electronics,
vol. 23, no. 5, pp. 2516–2523, Sept 2008. [cited at p. 42]
[55] P. Antoniewicz, M. P. Kazmierkowski, P. Cortes, J. Rodriguez, and A. Sikorski,
“Predictive direct power control algorithm for three phase ac/dc converter,” in Proc.
of IEEE-EUROCON 2007, pp. 1530–1534, 9–12 Sept 2007. [cited at p. 42, 46]
[56] P. Antoniewicz and M. P. Kazmierkowski, “Predictive direct power control of threephase
boost rectifier,” Bulletin of Polish Academy of Science, Technical Sciences,
vol. 54, no. 3, pp. 287–292, 2006. [cited at p. 42]
[57] J. Rodriguez, J. Pontt, P. Correa, P. Lezana, and P. Cortes, “Predictive power
control of an ac/dc/ac converter,” in Proc. of IEEE-IAS 2005, vol. 2, pp. 934–939,
2–6 Oct 2005. [cited at p. 42]
[58] R. Vargas, P. Cortes, U. Ammann, J. Rodríguez, and J. Pontt, “Predictive control
of a three-phase neutral-point-clamped inverter,” IEEE Trans. on Industrial
Electronics, vol. 54, no. 5, pp. 2697–2705, Oct 2007. [cited at p. 42]
[59] J. D. Barros and J. F. Silva, “Predictive optimal control for three-phase neutral
point clamped multilevel converters,” in Proc. of POWERENG 2007, pp. 618–623,
12–14 April 2007. [cited at p. 42]
[60] ——, “Optimal predictive control of three-phase npc multilevel inverter: Comparison
to robust sliding mode controller,” in Proc. of IEEE-PESC 2007, pp. 2061–2067,
17–21 June 2007. [cited at p. 42]
[61] S. Aurtenechea, M. A. Rodriguez, E. Oyarbide, and J. R. Torrealday, “Predictive
direct power control of mv-grid-connected two-level and three-level npc converters:
Experimental results,” in Proc. of EPE 2007, pp. 1–10, 2–5 Sept 2007. [cited at p. 42]
[62] ——, “Predictive direct power control of mv grid-connected three-level npc converters,”
in Proc. of IEEE-ISIE 2007, pp. 901–906, 4–7 June 2007. [cited at p. 42]
[63] P. Zanchetta, D. B. Gerry, V. G. Monopoli, J. C. Clare, and P. W. Wheeler, “Predictive
current control for multilevel active rectifiers with reduced switching frequency,”
IEEE Trans. on Industrial Electronics, vol. 55, no. 1, pp. 163–172, Jan
2008. [cited at p. 42]
[64] T. Nussbaumer, M. L. Heldwein, G. Gong, S. D. Round, and J. W. Kolar, “Comparison
of prediction techniques to compensate time delays caused by digital control
of a three-phase buck-type pwm rectifier system,” IEEE Trans. on Industrial Electronics,
vol. 55, no. 2, pp. 791–799, Feb 2008. [cited at p. 42]
[65] M. Perez, J. Rodriguez, and A. Coccia, “Predictive current control in a single
phase pfc boost rectifier,” in Proc. of IEEE-ICIT 2009, 10–13 Feb 2009, in review.
[cited at p. 42]

116 BIBLIOGRAPHY
[66] F. Morel, J. M. Retif, X. Lin-Shi, B. Allard, and P. Bevilacqua, “A predictive control
for a matrix converter-fed permanent magnet synchronous machine,” in Proc. of
PESC 2008, pp. 15–21, 15–19 June 2008. [cited at p. 42]
[67] R. Vargas, M. Rivera, J. Rodriguez, J. Espinoza, and P. Wheeler, “Predictive torque
control with input pf correction applied to an induction machine fed by a matrix
converter,” in Proc. of PESC 2008, pp. 9–14, 15–19 June 2008. [cited at p. 42]
[68] M. E. Rivera, R. E. Vargas, J. R. Espinoza, and J. R. Rodriguez, “Behavior of
the predictive dtc based matrix converter under unbalanced ac supply,” in Proc. of
IEEE-IAS 2007, pp. 202–207, 23–27 Sept 2007. [cited at p. 42]
[69] J. Rodriguez, J. Pontt, R. Vargas, P. Lezana, U. Ammann, P. Wheeler, and F. Garcia,
“Predictive direct torque control of an induction motor fed by a matrix converter,”
in Proc. of EPE 2007, pp. 1–10, 2–5 Sept 2007. [cited at p. 42]
[70] S. Aurtenechea, M. A. Rodríguez, E. Oyarbide, and J. R. Torrealday, “Predictive
direct power control - a new control strategy for dc/ac converters,” in Proc. of
IEEE-IECON 2006, pp. 1661–1666, Nov 2006. [cited at p. 42]
[71] P. Antoniewicz, M. P. Kazmierkowski, S. Aurtenechea, and M. A. Rodriguez, “Comparative
study of two predictive direct power control algorithms for three-phase
ac/dc converters,” in Proc. of EPE 2007, pp. 1–10, 2–5 Sept 2007. [cited at p. 42, 50]
[72] S. Aurtenechea, M. A. Rodriguez, E. Oyarbide, and J. R. Torrealday, “Predictive
control strategy for dc/ac converters based on direct power control,” IEEE Trans.
on Industrial Electronics, vol. 54, no. 3, pp. 1261–1271, June 2007. [cited at p. 42]
[73] P. Cortes, J. Rodriguez, D. E. Quevedo, and C. Silva, “Predictive current control
strategy with imposed load current spectrum,” IEEE Trans. on Power Electronics,
vol. 23, no. 2, pp. 612–618, March 2008. [cited at p. 46]
Papers written during work on this thesis:
Journal Papers:
1. P. Antoniewicz, and M. P. Kazmierkowski, “Virtual flux based predictive
direct power control of ac/dc converters with on-line inductance estimation,”
IEEE Trans. on Industrial Electronics, vol. 55, no. 12, pp. 4381–
4390, Dec 2008.
2. P. Cortes, J. Rodriguez, P. Antoniewicz, and M. P. Kazmierkowski, “Direct
power control of an AFE using predictive control,” IEEE Trans. on
Power Electronics, vol. 23, no. 5, pp. 2516—2523, Sept 2008.
3. P. Antoniewicz, and M. P. Kazmierkowski, “Predictive direct power control
of three-phase boost rectifier,” Bulletin of The Polish Academy of Sciences
Technical Sciences, vol. 54, no. 3, pp. 287–292, 2006.

BIBLIOGRAPHY 117
4. M. Jasiński, P. Antoniewicz, and M. P. Kaźmierkowski, “Napędy indukcyjne
zasilane w układzie prostownik PWM / falownik PWM ze sterowaniem
wektorowym,” Przegląd Elektrotechniczny, vol. 81, no. 6, pp. 1–5, June
2005.
Conference Papers:
5. P. Antoniewicz, M. P. Kazmierkowski, and M. Jasinski, “Comparative
Study of Two Direct Power Control Algorithms for AC/DC Converters,”
in Proc. of IEEE SIBIRCON 2008, pp. 159–163, 21–25 July 2008.
6. P. Antoniewicz, M. P. Kaźmierkowski, and M. Jasiński, “Porównanie
dwóch algorytmów bezpośredniego sterowania mocą dla trójfazowego przekształtnika
AC/DC,” in Proc. of MIS 2008, 23–27 June 2008.
7. P. Antoniewicz, and M. P. Kazmierkowski, “Virtual Flux Predictive Direct
Power Control of Three Phase AC/DC Converter,” in Proc. of IEEE
HSI 2008, pp. 510–515, 25–27 May 2008.
8. A. Sikorski, A. Ruszczyk, M. Korzeniewski, M. P. Kaźmierkowski, P. Antoniewicz,
W. Kołomyjski, and M. Jasiński, “Porównanie właściwości metod
bezpośredniej regulacji strumienia i momentu (DTC-SVM, DTC-δ, DTC-
2x2),” in Proc. of SENE 2007, pp. 427–432, 21–23 Nov 2007.
9. A. Sikorski, M. Korzeniewski, A. Ruszczyk, M. P. Kazmierkowski, P. Antoniewicz,
W. Kolomyjski, and M. Jasinski, “A Comparison of Properties
of Direct Torque and Flux Control Methods (DTC-SVM, DTC-δ, DTC-2x2,
DTFC-3A),” in Proc. of IEEE EUROCON 2007, pp. 1733-1739, 9-12 Sept
2007.
10. P. Antoniewicz, M. P. Kazmierkowski, P. Cortes, J. Rodriguez, and
A. Sikorski, “Predictive Direct Power Control Algorithm for Three Phase
AC/DC Converter,” in Proc. of IEEE EUROCON 2007, pp. 1530–1534,
9-12 Sept 2007.
11. P. Antoniewicz, M. P. Kazmierkowski, S. Aurtenechea, and M. A. Rodriguez,
“Comparative Study of Two Predictive Direct Power Control Algorithms
for Three-Phase AC/DC Converters,” in Proc. of IEEE EPE 2007,
pp. 1–10, 2–5 Sept 2007.
12. M. Kazmierkowski, M. Jasinski, M. Malinowski, T. Platek, S. Stynski,
P. Antoniewicz, W. Kolomyjski, D. Swierczynski, H. Ch. Soerensen, E.
Friis-Madsen, L. Christiansen, W. Knapp, Z. Zhou, and P. Igic, “Sea Wave
Energy Converter - Wave Dragon MW for Few Megawatts Power Range,”
in Proc. of Elektrotechnika 2006, on CD, 12–13 Dec 2006.

118 BIBLIOGRAPHY
13. A. Lopez de Heredia, P. Antoniewicz, I. Etxeberria-Otadui, M. Malinowski,
and S. Bacha, “A Comparative Study Between the DPC-SVM
and the Multi-Resonant Controller for Power Active Filter Applications,”
in Proc. of IEEE ISIE’2006, vol. 2, pp. 1058–1063, 9–13 July 2006.
14. P. Antoniewicz, and M. P. Kazmierkowski, “Predictive Power Control for
PWM Rectifier,” in Proc. of SENE 2005, pp. 15–20, 23–25 Nov 2005.
15. P. Antoniewicz, M. Jasinski, and M. P. Kazmierkowski, “AC/DC/AC
Converter with Reduced DC Side Capacitor Value,” in Proc. of IEEE
EUROCON 2005, vol. 2, pp. 1481–1484, 21–24 Nov 2005.
16. P. Antoniewicz, “Predictive Direct Power Control of a Rectifier,” in Proc.
of PELINCEC 2005, on CD, 16–19 Oct 2005.
17. P. Antoniewicz, and M. Jasinski, “Vector Control of PWM Rectifier -
Inverter Fed Induction Motor,” in Proc. of NorMUD’05, pp. 97–101, 2–
4 Sept 2005.
18. P. Antoniewicz, and M. Jasiński, “Przekształtnik AC/DC/AC ze zmniejszoną
wartością kondensatora w obwodzie pośredniczącym,” in Proc.
of PES-5, pp. 13–20, 20–24 June 2005.
19. M. Jasinski, P. Antoniewicz, and M. P. Kazmierkowski, “Vector control
of PWM rectifier - inverter - fed induction machine - a comparison,” in
Proc. of IEEE CPE 2005, pp. 91–95, 1–3 June 2005.

Appendices
119

Appendix A
Coordinate transformations
Due to space vector theory it is possible to describe three phase circuits in various
rectangular coordinate systems. There are two main rectangular coordinate
systems:
• Stationary system (αβ)
• Rotating system (dq)
A.1 Stationary system
If we introduce stationary rectangular coordinate system in such way that α is
real axis and β imagine axis, space vector can be composed as:
k αβ = k α + jk β
(A.1)
Taking into account (2.2) transformation from natural abc to stationary αβ coordinate
system can be expressed as:
[ ] [ ] ⎡ ⎤
k
k α 1 0 0 a
= √ √
⎢ ⎥
k β 0 3
3
− 3 ⎣ k b ⎦
(A.2)
3 k c
where: [
1 0 0
is called matrix transformation.
The reversal transformation:
⎡ ⎤
k a
⎢ ⎥
⎣ k b ⎦ =
k c
0
√ √
3
3
− 3
3
⎡
⎢
⎣
]
1 0
− 1 2
= A abc2αβ (A.3)
√
3
2
− 1 2 − √
3
2
121
⎤
⎥
⎦
[ ]
k α
k β
(A.4)

a α
ka kα kαβ
a α
kα kαβ
ka
122 APPENDIX A. COORDINATE TRANSFORMATIONS
where:
⎡
⎢
⎣
1 0
− 1 2
√
3
2
− 1 2 − √
3
2
⎤
⎥
⎦ = A αβ2abc
(A.5)
is called matrix transformation. Figures A.1 and A.2 show graphical transformation
between coordinate systems.
kβ kc β
kb
Figure A.1: Transformation from natural to stationary coordinate system
c b
kβ kc kb β
Figure A.2: Transformation from stationary to natural coordinate system
c b

q
β
A.2. ROTATING SYSTEM 123
A.2 Rotating system
Let consider space vector k in stationary αβ system, which will be transformed
into rotating with angular frequency coordinate dq system.
Ω r = dγ r
dt
where: γ r is an angle between real axes: α and d of coordinate systems.
(A.6)
Figure A.3: Transformation from stationary to rotating coordinate system
kβ α kd kq γr Ωr γ d
The expressions can be written as:
kkα
k r = ke −jγ r
(A.7)
= (k α + jk β )(cos γ r − j sin γ r )
= k α cos γ r + k β sin γ r + j(−k α sin γ r + k β cos γ r ) (A.8)
or as a matrix: [ ] [
k d
=
k q
] [ ]
cos γ r sin γ r k α
− sin γ r cos γ r k β
(A.9)
where: [
]
cos γ r sin γ r
= A αβ2dq (A.10)
− sin γ r cos γ r
is matrix transformation.
The inverse equation:
k = k r e jγ r
= (k d + jk q )(cos γ r + j sin γ r )
(A.11)
= k d cos γ r − k q sin γ r + j(k d sin γ r + k q cos γ r ) (A.12)

124 APPENDIX A. COORDINATE TRANSFORMATIONS
or as a matrix: [ ] [
] [
k α cos γ r − sin γ r
=
k β sin γ r cos γ r
]
k d
k q
(A.13)
where: [
]
cos γ r − sin γ r
= A dq2αβ (A.14)
sin γ r cos γ r
is matrix transformation.

Appendix B
Predictive Current Control
B.1 Predictive Current Control in stationary system
Predictive Current Control in αβ coordinates PCC αβ is based on mathematical
model of the converter (2.13).
U Lαβ = L dI Lαβ
dt
+ RI Lαβ + U P αβ (B.1)
Eq. (B.1) can be rewritten as a difference equation:
U Lαβ = L (I Lαβ + ∆I Lαβ ) − I Lαβ
∆t
+ RI Lαβ + U P αβ (B.2)
(I Lαβ + ∆I Lαβ ) = ∆t
L (U Lαβ − U P αβ ) + I Lαβ
(
1 − R L ∆t )
(B.3)
where: I Lαβ is line current space vector, ∆I Lαβ is differential of line current space
vector and sum of this components gives I LαβP (B.4) predicted current vector,
∆t is time difference, and can be noticed as a sampling time (B.5).
(I Lαβ + ∆I Lαβ ) = I LαβP (B.4)
∆t = T s
After decomposition yields:
I LαP = T (
s
L (U Lα − U P α ) + I Lα 1 − R )
L T s
I LβP = T (
s
L (U Lβ − U P β ) + I Lβ 1 − R )
L T s
(B.5)
(B.6)
(B.7)
125

UPUDC
7
ILαβP
UDCSabc
uLab
iLab
126 APPENDIX B. PREDICTIVE CURRENT CONTROL
As it was mentioned in Section 2.2 VSC has eight permitted states what corresponds
to eight possible voltage vectors U P . The goal of the Predictive Current
Controller is to calculate current behavior I LαβP for all possible states U P . Voltage
vector, which minimizes cost function value, defined as:
J =
√
(I αref − I LαP ) 2 + (I βref − I LβP ) 2 (B.8)
is being selected for next sampling period.
PLL
αβ
abc
7
Current Model
Predictive Control
ULαβILαβ
(αβ)
Cost Function
Minimization
PI
-
LOAD
VSC
Iαβref
Figure B.1: Control scheme of Predictive Current Control in αβ coordinates
PCC αβ
UDCref
Idref
Lets consider operation of PCC αβ under 600 V of U DC and conditions listed
in Tab. B.1.
On the basis of (B.6) and (B.7) values of predicted line currents I LαβP are
calculated for every voltage vector. Table B.2 summarizes results. As it can be
seen, the minimum value of cost function J is achieved by U P 3 voltage vector,
and this vector will be selected for next sampling period. Figure B.2 shows vector
diagram of predicted currents in αβ coordinates.

∆ILαβP6
∆ILαβP5
Figure B.2: Vector diagram of predicted currents in PCC αβ
ILαβ
B.2. PREDICTIVE CURRENT CONTROL IN ROTATING SYSTEM 127
U Lα 141 V U Ld 200 V
U Lβ 141 V U Lq 0 V
I Lα 0 A I Ld 2 A
I Lβ 2.82 A I Lq 2 A
I Lαref 1.41 A I Ldref 2 A
I Lβref 1.41 A I Lqref 0 A
Table B.1: An example operating conditions of PCC αβ and PCC dq
U P I LαP [A] I LβP [A] I Lαerr [A] I Lβerr [A] J [A]
U P 1 -1.29 3.53 2.7 -2.11 3.43
U P 2 -0.29 1.8 1.7 -0.38 1.75
U P 3 1.7 1.8 -0.29 -0.38 0.48
U P 4 2.7 3.53 -1.29 -2.11 2.48
U P 5 1.7 5.26 -0.29 -3.85 3.86
U P 6 -0.29 5.26 1.7 -3.85 4.21
U P 0 0.7 3.53 0.7 -2.11 2.23
Table B.2: An example operation of PCC αβ
β
∆ILαβP1
∆ILαβP3 ∆ILαβP4
∆ILαβP0
α
∆ILαβP2
Iαβref
B.2 Predictive Current Control in rotating system
Predictive Current Control in dq coordinates PCC dq is based on mathematical
model of the converter. Transformation of the difference equation (B.3) into

UPdqUDC
Iqref
7
ILdqP
UDCSabc
128 APPENDIX B. PREDICTIVE CURRENT CONTROL
rotating system gives:
U Ldq = L (I Ldq + ∆I Ldq ) − I Ldq
∆t
+ RI Ldq + U P dq (B.9)
(I Ldq + ∆I Ldq ) = ∆t
L (U Ldq − U P dq ) + I Ldq
(
1 − R L ∆t )
(B.10)
where: I Ldq is line current space vector, ∆I Ldq is differential of line current space
vector and sum of this components gives I LdqP (B.11) predicted current vector:
(I Ldq + ∆I Ldq ) = I LdqP (B.11)
dq
abc
uLab
7
Current Model
Predictive Control
ULdqILdq
(dq)
Cost Function
Minimization
iLab
VSC
PI
-
LOAD
Figure B.3:
PCC dq
Control scheme of Predictive Current Control in dq coordinates
Idref
After decomposition into dq components:
I LdP = T (
s
L (U Ld − U P d ) + I Ld 1 − R L T s
UDCref
)
(B.12)

Figure B.4: Vector diagram of predicted currents in PCC dq
∆ILdqP0
B.2. PREDICTIVE CURRENT CONTROL IN ROTATING SYSTEM 129
I LqP = T (
s
L (U Lq − U P q ) + I Lq 1 − R )
L T s
(B.13)
Next, on the basis of (B.12) and (B.13) future currents I LdqP are calculated for
every voltage vector U P dq . Voltage vector, which minimizes cost function value
J, defined as:
√
J = (I dref − I LdP ) 2 + (I qref − I LqP ) 2 (B.14)
is being selected for next sampling period.
U P I LdP [A] I LqP [A] I Lderr [A] I Lqerr [A] J [A]
U P 1 1.58 3.41 0.41 -3.41 3.43
U P 2 1.06 1.48 0.93 -1.48 1.75
U P 3 2.48 0.06 -0.48 -0.06 0.48
U P 4 4.41 0.58 -2.41 -0.58 2.48
U P 5 4.93 2.51 -2.93 -2.51 3.86
U P 6 3.51 3.93 -1.51 -3.93 4.21
U P 0 2.99 1.99 -0.99 -1.99 2.23
Table B.3: An example operation of PCC dq
q
∆ILdqP1
∆ILdqP6∆ILdqP5
d
Table B.3 and Fig. B.4 show example operation of the PCC dq under conditions
listed in Tab. B.1. Note that for both control methods PCC αβ and PCC dq
the same voltage vector has been selected.
∆ILdqP2 ∆ILdqP3 ∆ILdqP4
ILdqIdqref

Appendix C
Predictive Direct Power Control
In subsection 4.6.4 cost function has been determined as:
J = [ P ref − P − 2 ( f p1 t 1 + f p2 t 2 + f p3
( 1
2 T s − t 1 − t 2
))] 2
+ [ Q ref − Q − 2 ( f q1 t 1 + f q2 t 2 + f q3
( 1
2 T s − t 1 − t 2
))] 2 (C.1)
where: P ref , Q ref , P , Q are referenced and measured active and reactive powers,
f p1 , f p2 , f p3 , f q1 , f q2 , f q3 are time power derivatives caused by application of U P i
VSC vectors, and t 1 , t 2 , t 3 are vectors application times.
Lets consider operating conditions listed in Tab. C.1. As it can be seen, line
voltage space vector U Lαβ is placed in the second sector, so switching table selects
{0, 1, 2, 2, 1, 0} U P vector sequence (Tab. 4.4).
U Lαβ 200e j45 V P 600 W
I Lαβ 2.82e j90 A Q −600 var
U DC 600 V P ref 600 W
L 0.01 H Q ref 0 var
R 0.1 Ω T s 200 µs
Table C.1: An example operating conditions of CSF-P-DPC
On the basis of (4.23), (4.24) power derivatives f p0 , f p1 , f p2 for U p0 , U p1 ,
U p2 vectors are calculated (Tab. C.2).
f p0 4.121663706143591 MW/s f q0 0.1296637061435918 Mvar/s
f p1 −1.535190543348789 MW/s f q1 −5.527190543348787 Mvar/s
f p2 −3.605742904168955 MW/s f q2 7.857070316456137 Mvar/s
Table C.2: Value of active f pi and reactive f qi power derivatives
131

132 APPENDIX C. PREDICTIVE DIRECT POWER CONTROL
Next, from (4.40) cost function J is described as:
[ (−15.45481322062509
J =
∗ 10
6 ) t 1 + ( −4.141104721640333 ∗ 10 6) t 2
2 [ (15.45481322062509
+ 721.1485808337910]
+ ∗ 10
6 ) t 1
(C.2)
+ ( 26.76852171960985 ∗ 10 6) ] 2
t 2 − 971.4140632912274
In order to find minimum value of J function, partial derivatives (4.43), (4.44)
are calculated:
∂J
∂t 1
= 0 ⇒ (955405006.7376324
∗ 10
6 ) t 1 + ( 955405006.7376324 ∗ 10 6) t 2 (C.3)
= 52316.47905831899 ∗ 10 6
∂J
∂t 2
= 0 ⇒ (955405006.7376324
∗ 10
6 ) t 1 + ( 1467405006.737632 ∗ 10 6) t 2 (C.4)
= 57979.34049008143 ∗ 10 6
Figure C.1 (a), (b) show cost function J diagram versus voltage vector application
time t 1 , t 2 for conditions listed in Tab. C.1. The minimum value of J
function is reached by (4.45), (4.46):
t 1 = 43.69815468216835 µs
t 2 = 11.06027623391102 µs
t 3 = 45.24156908392062 µs
(C.5)
where t 3 is calculated from (4.47).

133
(a)
x 10 7 t 1
2
1.8
J minimum
1.6
1.4
1.2
J
1
0.8
0.6
0.4
0.2
0
0 40e−6 80e−6
t 2
120e−6 160e−6 200e−6
200e−6
160e−6
120e−6
0 40e−6
80e−6
200e−6
(b)
160e−6
J minimum
120e−6
t 1
80e−6
40e−6
0
0 40e−6 80e−6 120e−6 160e−6 200e−6
t 2
Figure C.1: Diagram of cost function J versus t 1 and t 2 : (a) 3-D view, (b) 2-D
view

List of Symbols
and Abbreviations
Symbols Description Definition
1 unity vector page 8
a complex unity vector a = e j 2π 3 page 8
a 2 complex unity vector a 2 = e −j 2π 3 page 8
d P active power hysteresis controller output page 21
d Q reactive power hysteresis controller output page 21
f pi active power time derivative page 51
f qi reactive power time derivative page 51
H P active power hysteresis controller band page 21
H Q reactive power hysteresis controller band page 21
i c DC-link capacitor current page 12
I DC DC-link current page 12
I dref reference value of current in d axis page 17
I qref reference value of current in q axis page 17
I L space vector of line current page 10
I Lαβ space vector of line current in αβ page 13
I LαβP space vector of predicted line current in αβ page 125
I Ldq space vector of line current in dq page 14
I LdqP space vector of predicted line current in dq page 128
i load VSC load current page 12
K C current controller proportional gain page 19
K P power controller proportional gain page 25
K P U DC-link voltage controller proportional gain page 25
K RL gain of choke math. model page 19
L choke inductance page 9
L C choke inductance used in predictive control page 77
method
N S number of transistor “on” and “off ” switchings page 33
P active power page 23
P P predicted active power page 43
135

136 LIST OF SYMBOLS AND ABBREVIATIONS
Symbols Description Definition
P ref referenced active power page 21
Q reactive power page 23
Q P predicted reactive power page 43
Q ref referenced reactive power page 21
R choke resistance page 9
R C choke resistance used in predictive control algorithm
page 79
S abc converter switching states page 11
S αβ space vector of converter switching states in αβ page 13
S dq space vector of converter switching states in dq page 14
t 1 U P application time page 52
t 2 U P application time page 52
t 3 U P application time page 52
T fC referenced current prefilter time constant page 19
T fP referenced power prefilter time constant page 26
T fU referenced DC-link voltage prefilter time constant page 21
T I power controller time constant page 25
T IC current controller time constant page 19
T IU DC-link voltage controller time constant page 25
T P W M PWM generation time delay page 19
T RL time constant of choke math. model page 19
T s sampling time page 19
U DC DC-link voltage page 10
U DCerr DC-link voltage error page 17
U DCref reference DC-link voltage page 17
U i space vector of voltage drop on VSC choke page 11
u L line voltage page 11
U L space vector of line voltage page 10
U Lαβ space vector of line voltage in αβ page 13
U Ldq space vector of line voltage in dq page 14
U P space vector of VSC input voltage page 10
U P αβ space vector of VSC input voltage in αβ page 13
U P αβref space vector of referenced VSC input voltage in page 17
αβ
u P DC− voltage measured between converter input page 33
and negative DC bus
U P dq space vector of VSC input voltage in dq page 14
U P dqref space vector of referenced VSC input voltage in dq page 14
∆I Lαβ space vector of line current differential in αβ page 125
∆I Ldq space vector of line current differential in dq page 128
∆L choke inductance value mismatch in [%] page 77
∆P active power differential page 43
∆R choke resistance value mismatch in [%] page 79
∆Q reactive power differential page 43
∆t time differential page 43

137
Symbols Description Definition
ω L angular frequency of line voltage page 14
Ψ L space vector of virtual flux page 30
Ψ Lαβ space vector of virtual flux in αβ page 29
τ 0 transistor dead time page 19
τ t sum of small time constants page 19

138 LIST OF SYMBOLS AND ABBREVIATIONS
Abbreviation Description Definition
AFE Active Front End page 1
CSF-P-DPC Constant Switching Frequency Predictive Direct page 50
Power Control
DC-link Direct Current link page 10
DPC-SVM Direct Power Control with Space Vector Modulator
page 25
DSP Digital Signal Processing page 42
FL-VSF-P-DPC Switching Frequency Limited VSF-P-DPC page 49
HC-VSF-P-DPC VSF-P-DPC with Current Harmonics control page 46
IGBT Insulated-Gate Bipolar Transistor page 9
LPF Low Pass Filter page 31
MPC Model Predictive Control page 42
PCC αβ Predictive Current Control in αβ coordinates page 125
PCC dq Predictive Current Control in dq coordinates page 127
PI Proportional-Integral Controller page 21
SO Symmetry Optimum design method page 25
ST-DPC Switching Table based Direct Power Control page 21
VF Virtual Flux page 28
VF-CSF-P-DPC Virtual Flux based Constant Switching Frequency page 58
Predictive Direct Power Control
VFOC Virtual Flux Oriented Control page 25
VOC Voltage Oriented Control page 17
VSF-P-DPC Variable Switching Frequency Predictive Direct page 42
Power Control
VSC Voltage Source Converter page 7

List of Figures
1.1 Conjunction between predictive control and other methods . . . . . . 2
1.2 Classification of predictive control methods used in power electronics . 3
2.1 Construction of space vector . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Scheme of VSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Switching states of VSC . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Representation of VSC AC-side voltage as space vector . . . . . . . . 10
2.5 Single phase representation of VSC . . . . . . . . . . . . . . . . . . . . 10
2.6 Phasor diagrams of VSC . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.7 Block scheme of VSC in natural coordinates . . . . . . . . . . . . . . . 12
2.8 Block scheme of VSC in stationary coordinates . . . . . . . . . . . . . 13
2.9 Block scheme of VSC in rotating dq coordinates . . . . . . . . . . . . 14
3.1 Basic block scheme of VOC . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2 Vector diagram of VOC . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 Block diagram of active current control loop in VOC . . . . . . . . . . 19
3.4 Step response of active current control loop in VOC . . . . . . . . . . 19
3.5 Step response of discretized active current control loop in VOC . . . . 20
3.6 Block diagram of DC-link voltage control loop in VOC . . . . . . . . . 20
3.7 Step response of DC voltage control loop in VOC . . . . . . . . . . . . 21
3.8 Block scheme of ST-DPC . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.9 Sector selection for ST-DPC and VF-ST-DPC . . . . . . . . . . . . . . 23
3.10 Block scheme of DPC-SVM . . . . . . . . . . . . . . . . . . . . . . . . 26
3.11 Block diagram of active power control loop in DPC-SVM . . . . . . . 26
3.12 Step response of active power control loop in DPC-SVM . . . . . . . . 27
3.13 Step response of discretized active power control loop in DPC-SVM . 27
3.14 Block diagram of DC-link voltage control loop in DPC-SVM . . . . . 28
3.15 Step response of DC voltage control loop in DPC-SVM . . . . . . . . 28
3.16 Scheme of VSC with AC side presented as a virtual AC motor . . . . 30
3.17 Line voltage and virtual flux coordinates transformation . . . . . . . . 30
139

140 LIST OF FIGURES
3.18 Virtual flux estimator with ideal integration . . . . . . . . . . . . . . . 31
3.19 Virtual flux estimator with LPF . . . . . . . . . . . . . . . . . . . . . 31
3.20 Virtual flux estimator with LPF and gain part K . . . . . . . . . . . . 32
3.21 Steady state operation of DPC-SVM . . . . . . . . . . . . . . . . . . . 33
3.22 Steady state operation of ST-DPC . . . . . . . . . . . . . . . . . . . . 34
3.23 Line current harmonics spectrum . . . . . . . . . . . . . . . . . . . . . 34
3.24 Switchings number in DPC-SVM and ST-DPC . . . . . . . . . . . . . 35
3.25 Transient operation of DPC-SVM (P ref step) . . . . . . . . . . . . . . 36
3.26 Transient operation of ST-DPC (P ref step) . . . . . . . . . . . . . . . 37
3.27 Transient operation of DPC methods (P ref step) in zoom . . . . . . . 37
3.28 Transient operation of DPC-SVM and ST-DPC (U DCref step) . . . . . 38
4.1 Active and reactive power derivatives behavior . . . . . . . . . . . . . 44
4.2 Control scheme of VSF-P-DPC . . . . . . . . . . . . . . . . . . . . . . 45
4.3 Vector diagram of predicted powers in VSF-P-DPC . . . . . . . . . . . 46
4.4 Control scheme of VSF-P-DPC with current spectrum control . . . . . 47
4.5 Bode diagrams of cost function filters . . . . . . . . . . . . . . . . . . 48
4.6 Control scheme of FL-VSF-P-DPC . . . . . . . . . . . . . . . . . . . . 49
4.7 Active and reactive power changes under three U P i application . . . . 52
4.8 Active and reactive power changes under symmetrical U P i application 53
4.9 Converter voltage vector U P selection in 1st sector . . . . . . . . . . . 54
4.10 Graphical representation of converter voltage vector U P selection . . . 55
4.11 Control scheme of CSF-P-DPC . . . . . . . . . . . . . . . . . . . . . . 57
4.12 Converter voltage vector U P selection . . . . . . . . . . . . . . . . . . 60
4.13 Control scheme of VF-CSF-P-DPC . . . . . . . . . . . . . . . . . . . . 61
4.14 Steady state operation of VSF-P-DPC . . . . . . . . . . . . . . . . . . 63
4.15 Steady state operation of HC-VSF-P-DPC . . . . . . . . . . . . . . . . 63
4.16 Steady state operation of FL-VSF-P-DPC . . . . . . . . . . . . . . . . 64
4.17 Steady state operation of CSF-P-DPC . . . . . . . . . . . . . . . . . . 64
4.18 Steady state operation of VF-CSF-P-DPC . . . . . . . . . . . . . . . . 65
4.19 Number transistor switchings in predictive methods . . . . . . . . . . 66
4.20 Line current harmonics spectrum . . . . . . . . . . . . . . . . . . . . . 67
4.21 Transient operation of VSF-P-DPC and HC-VSF-P-DPC (P ref step) . 68
4.22 Transient operation of FL-VSF-P-DPC and CSF-P-DPC (P ref step) . 69
4.23 Transient operation of VF-CSF-P-DPC (P ref step) . . . . . . . . . . . 70
4.24 Transient operation (P ref step) in zoom . . . . . . . . . . . . . . . . . 71
4.25 Transient operation of VSF-P-DPC and HC-VSF-P-DPC (U DCref step) 72
4.26 Transient operation of FL-VSF-P-DPC and CSF-P-DPC (U DCref step) 73
4.27 Transient operation of VF-CSF-P-DPC (U DCref step) . . . . . . . . . 74
5.1 Average switching frequency versus ∆L in VSF-P-DPC . . . . . . . . 78
5.2 Power error versus ∆L . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

LIST OF FIGURES 141
5.3 Line current T HD i factor versus ∆L . . . . . . . . . . . . . . . . . . . 78
5.4 Average switching frequency versus ∆R in VSF-P-DPC . . . . . . . . 79
5.5 Power error versus ∆R . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
5.6 Line current T HD i factor versus ∆R . . . . . . . . . . . . . . . . . . . 80
5.7 On-line choke inductance estimator related to γ UL angle . . . . . . . . 81
5.8 On-line choke inductance estimator related to the γ ΨL angle . . . . . . 81
5.9 On-line choke estimator operation with −90% L C mismatch . . . . . . 82
5.10 On-line choke estimator operation with +200% L C mismatch . . . . . 83
5.11 Steady state operation under line voltage distortion part 1 . . . . . . . 84
5.12 Steady state operation under line voltage distortion part 2 . . . . . . . 84
5.13 Steady state operation under line voltage distortion part 3 . . . . . . . 85
5.14 Steady state operation under line voltage distortion part 4 . . . . . . . 85
5.15 Operation under single phase voltage sag . . . . . . . . . . . . . . . . 86
5.16 Operation under two phase voltage sag . . . . . . . . . . . . . . . . . . 87
5.17 Current T HD factor in presence of single phase voltage sag . . . . . . 87
5.18 Operation under two phase voltage sag . . . . . . . . . . . . . . . . . . 88
6.1 Experimental steady state operation part 1 . . . . . . . . . . . . . . . 90
6.2 Experimental steady state operation part 2 . . . . . . . . . . . . . . . 91
6.3 Summarized line current T HD factors and spectrum part 1 . . . . . . 92
6.4 Summarized line current T HD factors and spectrum part 2 . . . . . . 93
6.5 Experimental step change of P ref part 1 . . . . . . . . . . . . . . . . . 95
6.6 Experimental step change of P ref part 2 . . . . . . . . . . . . . . . . . 96
6.7 Zoomed experimental step change of P ref part 1 . . . . . . . . . . . . 97
6.8 Zoomed experimental step change of P ref part 2 . . . . . . . . . . . . 98
6.9 Experimental step change of U DCref part 1 . . . . . . . . . . . . . . . 99
6.10 Experimental step change of U DCref part 1 . . . . . . . . . . . . . . . 100
6.11 Summarized line current T HD factors and spectrum . . . . . . . . . . 101
6.12 Experimental steady-state operation . . . . . . . . . . . . . . . . . . . 102
6.13 Experimental step change of P ref . . . . . . . . . . . . . . . . . . . . . 103
6.14 Zoomed experimental step change of P ref . . . . . . . . . . . . . . . . 104
6.15 Experimental U DCref step change . . . . . . . . . . . . . . . . . . . . . 105
A.1 Transformation from natural to stationary coordinate system . . . . . 122
A.2 Transformation from stationary to natural coordinate system . . . . . 122
A.3 Transformation from stationary to rotating coordinate system . . . . . 123
B.1 Control scheme of PCC αβ . . . . . . . . . . . . . . . . . . . . . . . . . 126
B.2 Vector diagram of predicted currents in PCC αβ . . . . . . . . . . . . . 127
B.3 Control scheme of PCC dq . . . . . . . . . . . . . . . . . . . . . . . . . 128
B.4 Vector diagram of predicted currents in PCC dq . . . . . . . . . . . . . 129
C.1 Diagram of cost function J versus t 1 and t 2 . . . . . . . . . . . . . . . 133

List of Tables
1.1 Comparison of classical AC voltage sensorless control methods . . . . 3
1.2 Comparison of predictive control methods . . . . . . . . . . . . . . . . 4
3.1 Switching table related to line voltage vector position γ UL . . . . . . . 22
3.2 Switching table related to virtual flux vector position γ ΨL . . . . . . . 23
3.3 Main data of simulation model . . . . . . . . . . . . . . . . . . . . . . 32
3.4 Sampling and switching frequencies of tested control methods . . . . . 33
3.5 Dynamic properties of DPC methods for P ref step change . . . . . . . 39
3.6 Dynamic properties of DPC methods for U DCref step change . . . . . 39
4.1 An example operating conditions of VSF-P-DPC . . . . . . . . . . . . 44
4.2 An example operation of VSF-P-DPC . . . . . . . . . . . . . . . . . . 45
4.3 Number of switchings N S . . . . . . . . . . . . . . . . . . . . . . . . . 50
4.4 Switching table related to line voltage vector position γ UL . . . . . . . 55
4.5 Switching table related to virtual flux vector position γ ΨL . . . . . . . 60
4.6 Main data of simulation model . . . . . . . . . . . . . . . . . . . . . . 62
4.7 Sampling and switching frequencies of tested control methods . . . . . 62
4.8 Dynamic properties of P-DPC methods for P ref step change . . . . . . 74
4.9 Dynamic properties of P-DPC methods for U DCref step change . . . . 75
5.1 Summarized line current T HD i factors . . . . . . . . . . . . . . . . . . 86
6.1 Main data of laboratory set-up . . . . . . . . . . . . . . . . . . . . . . 89
6.2 Sampling and switching frequencies of tested methods . . . . . . . . . 93
6.3 Sampling and switching frequencies of tested control methods . . . . . 101
6.4 Summarized P ref step change dynamic . . . . . . . . . . . . . . . . . . 106
6.5 Summarized U DCref step change dynamic . . . . . . . . . . . . . . . . 106
6.6 Summarized P ref step change dynamic . . . . . . . . . . . . . . . . . . 106
6.7 Summarized U DCref step change dynamic . . . . . . . . . . . . . . . . 107
B.1 An example operating conditions of PCC αβ and PCC dq . . . . . . . . 127
142

LIST OF TABLES 143
B.2 An example operation of PCC αβ . . . . . . . . . . . . . . . . . . . . . 127
B.3 An example operation of PCC dq . . . . . . . . . . . . . . . . . . . . . 129
C.1 An example operating conditions of CSF-P-DPC . . . . . . . . . . . . 131
C.2 Value of active f pi and reactive f qi power derivatives . . . . . . . . . . 131

Index
band pass filter, 47
band stop filter, 47
buck converter, 42
cost function, 41, 42, 44, 45, 47, 49, 56
CSF, 41
CSF-P-DPC, 50
virtual AC motor, 29
Virtual Flux, 18, 21, 23–25, 28–31, 39, 58,
80
VOC, 17, 25, 39, 42
VSC, 7, 8, 13, 14, 39, 41, 44, 51
VSF, 41
VSF-P-DPC, 42, 44, 45
DC-link, 10, 17, 20, 21
DPC-SVM, 25, 32, 39
DSP, 24, 42
FL-VSF-P-DPC, 49
H-bridge, 42
HC-VSF-P-DPC, 46
hysteresis controller, 21, 22, 24, 25, 34, 39
IGBT, 9
look-up table, 21, 25, 39, 54, 59
matrix converter, 42
MPC, 42, 77
NPC, 42
on-line choke estimator, 80
P-DPC, 41
PI controller, 17–19, 21, 25, 39, 57
PWM, 24
space vector, 8, 29, 30, 53
ST-DPC, 21, 24, 25, 32, 39, 54
SVM, 25, 33, 39, 42
symmetry optimum, 18, 19, 25–27
VF-CSF-P-DPC, 58
VFOC, 25
145