SX8725 - Semtech
SX8725 - Semtech
SX8725 - Semtech
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ADVANCED COMMUNICATIONS & SENSING<br />
<strong>SX8725</strong><br />
ZoomingADC for Pressure and Temperature Sensing<br />
Output Code Format<br />
The ADC output code is a 16-bit word in two's complement format (see Table 15). For input voltages outside the<br />
range, the output code is saturated to the closest full-scale value (i.e. 0x7FFF or 0x8000). For resolutions<br />
smaller than 16 bits, the non-significant bits are forced to the values shown in Table 16. The output code,<br />
expressed in LSBs, corresponds to:<br />
OUT<br />
ADC<br />
Recalling equation 9, this can be rewritten as:<br />
OUT<br />
ADC<br />
2<br />
V<br />
⋅<br />
V<br />
REF , ADC<br />
OSR 1<br />
⋅<br />
OSR<br />
= (LSB)<br />
16 IN , ADC +<br />
Equation 17<br />
16 V ⎛<br />
V<br />
IN<br />
REF , ADC ⎞ OSR + 1<br />
= 2 ⋅ ⋅ GDTOT<br />
GDoffTOT<br />
V<br />
⎜ − ⋅<br />
REF , ADC<br />
V<br />
⎟ ⋅<br />
(LSB)<br />
⎝<br />
IN ⎠ OSR<br />
Equation 18<br />
where, from Equation 10and Equation 11, the total PGA gain and offset are respectively:<br />
GD TOT<br />
= GD<br />
(V/V)<br />
3<br />
⋅GD2<br />
⋅GD1<br />
and:<br />
GDoff TOT<br />
= GDoff<br />
(V/V)<br />
3<br />
+ GD3<br />
⋅GDoff2<br />
ADC Input Voltage V IN,ADC % of Full Scale (FS) Output in LSBs Output Code in Hex<br />
+2.46146V +0.5⋅FS +215-1=+32'767 7FFF<br />
+2.46138V ... +215-2=+32'766 7FFE<br />
... ... ... ...<br />
+75µV ... +1 0001<br />
0V 0 0 0000<br />
-75µV ... -1 8FFF<br />
... ... ... ...<br />
-2.46146V ... -215-1=-32'767 8001<br />
-2.46154V -0.5⋅FS -215=-32'768 8000<br />
Table 15 - Basic ADC Relationships (example for: V REF,ADC = 5V, OSR = 64, n = 16 bits)<br />
SET_OSR[2:0] SET_NELC = 00 SET_NELC = 01 SET_NELC = 10 SET_NELC = 11<br />
000 1000000000 100000000 10000000 1000000<br />
001 10000000 1000000 100000 10000<br />
010 100000 10000 1000 100<br />
011 1000 100 10 1<br />
100 10 1 - -<br />
101 - - - -<br />
110 - - - -<br />
111 - - - -<br />
Table 16 - Last Forced LSBs in Conversion Output Registers for Resolution Settings Smaller than 16<br />
bits (n < 16) (RegACOutMsb[7:0] & RegACOutLsb[7:0])<br />
V1.8 © 2009 <strong>Semtech</strong> Corp. www.semtech.com<br />
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