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HY16F188<br />
21-Bit ENOB Σ∆ADC<br />
32-Bit MCU and 64 KB Flash<br />
4.9 Analog Comparator Network<br />
CP_I<br />
VDD3V<br />
CPRLH<br />
VDD18<br />
OFF<br />
CPRH[2:0]<br />
Hysteresis<br />
CPDM CMPO Divider<br />
0000<br />
0001<br />
0001<br />
0010<br />
0010<br />
0011<br />
0011<br />
X<br />
1<br />
0<br />
1<br />
0<br />
1<br />
0<br />
CPDA[3:0]<br />
CPDA[3:1],1<br />
CPDA[3:1],0<br />
CPDA[3:2],1,CPDA[0]<br />
CPDA[3:2],0,CPDA[0]<br />
CPDA[3:2],11<br />
CPDA[3:2],00<br />
CPNS[1:0]<br />
CL1<br />
CL2<br />
CL3<br />
CL4<br />
CPCLS[1:0]<br />
00<br />
01<br />
10<br />
11<br />
CPRLH<br />
ENCLIN<br />
Non-overlap<br />
CL3<br />
Clock Gen<br />
TBCLK<br />
22.5R<br />
CPDA[3:0]<br />
CPDM[3:0]<br />
CH1<br />
CH2<br />
00<br />
01<br />
CH1<br />
16R<br />
16<br />
R_DA<br />
Mux<br />
RLO<br />
CH3<br />
10<br />
11<br />
-<br />
ENCMP<br />
CPDF<br />
CPOR<br />
CPRL<br />
CPRLL<br />
20R<br />
CMPO<br />
CH1<br />
00<br />
CPIS<br />
+<br />
2uS<br />
0<br />
Mux<br />
1<br />
0<br />
Mux<br />
1<br />
CMPO<br />
CMPIF<br />
CH2<br />
CH3<br />
01<br />
10<br />
.<br />
CMPHS<br />
V12<br />
11<br />
CPPS[1:0]<br />
© 2013 HYCON Technology Corp<br />
www.hycontek.com<br />
DS-HY16F188-V06_EN<br />
page30
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