Version 04
Version 04
Version 04
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HY16F188<br />
21-Bit ENOB Σ∆ADC<br />
32-Bit MCU and 64 KB Flash<br />
4.15 UART Block Diagram<br />
EUART TRANSMIT BLOCK DIAGRAM<br />
ENSP[0]<br />
Enable EUART<br />
Exclusive OR<br />
PARITY[0]<br />
XOR<br />
8<br />
Data Bus<br />
8<br />
TXREG Register<br />
TX9D[0]<br />
TX9D<br />
TX9[0]<br />
ENADD[0]<br />
1 0<br />
TXIE[0]<br />
Interrupt<br />
TXIF<br />
ENTX[0]<br />
(8) (7) ………… 0<br />
MSB TSR Register<br />
LSB<br />
Buffer<br />
and<br />
Control<br />
TX pin<br />
BRGRH BRGRL<br />
Baud Rate Generator<br />
TRMT[0]<br />
EUART 8-BITs RECEIVE BLOCK DIAGRAM<br />
.<br />
ENCR[0]<br />
OERR[0]<br />
OERR[0]<br />
ENSP[0]<br />
Enable EUART<br />
RC pin<br />
ENSP[0]<br />
Pin Buffer<br />
and Control<br />
BRGRH BRGRL<br />
Baud Rate Generator<br />
Data<br />
Recover<br />
Stop<br />
PARITY[0]<br />
PERR[0] 1<br />
7 ………… 1<br />
RSR Register<br />
Exclusive OR<br />
XOR<br />
8<br />
0 Start<br />
Interrupt<br />
RXIF[0]<br />
Overflow<br />
RXIE[0]<br />
RXREG Register<br />
8<br />
FIFO<br />
1 Don care PERR[0] state of 8-bits receive mode<br />
Data Bus<br />
© 2013 HYCON Technology Corp<br />
www.hycontek.com<br />
DS-HY16F188-V06_EN<br />
page36
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