High power RF-LDMOS transistors for base station applications

semiconductors
High power RF-LDMOS transistors
for base station applications
Delivering the power for upcoming wideband high-capacity base stations that will
provide the punch for high bit-rate information systems.
By Christopher P. Dragon,
Wayne R. Burger,
Bob Davidson, Enver Krvavac,
Nagaraj Dixit and Dale Joersz
With trials ongoing in Japan for
IMT-2000 and similar activity for
UMTS starting soon in Europe, the
2.11 to 2.17 GHz band for wideband
code division-multiple access (W-
CDMA) is getting considerable attention
from infrastructure base station
OEMs and high power RF transistor
manufacturers. As third generation
(3G) cellular systems such as W-CDMA
are emerging, the demand for transistors
with increased output power has
escalated in support of the RF power
amplifier designs required for base station
infrastructure.
The technical design and high volume
fabrication of transistors that
meet this demand pose a specific set of
challenges. The devices must be efficient
and possess a high degree of linearity.
Reasonably high impedances
must be presented to the input/output
terminals for ease of use, thermal management
and reliability. Device consistency
and cost are also important factors
for consideration.
For several years, RF-LDMOS has
been a leading technology used in support
of high power RF applications,
specifically for cellular base station
power amplifiers [1], [2]. Breakdown
Figure 1. Cross-section of a typical LDMOS
structure.
voltages in excess of 65 V facilitate the
use of a 28 V power supply while maintaining
superior ruggedness characteristics.
The p+ sinker (see Figure 1) provides
a low inductance path to ground,
and the inherent device linearity has
been used to great advantage.
This article discusses the parameters
that are considered critical for superior
W-CDMA performance and presents
the performance of a leading-edge RF-
LDMOS device design. The device
described here operates single-ended
(see Figures 2 and 3) and delivers 155
W, or 51.9 dBm of CW output power at
3 dB compression (P 3dB ) and 2.12 GHz.
Die technology is based on a fourthgeneration
process that uses a 40 nm
gate oxide, 0.6 µm gate length, die
thickness of 100 µm, and a total gate
periphery of 360 mm.
Linearity
Before the emergence of spread-spectrum
wireless protocols, a widely
accepted figure of merit for linearity in
class AB amplifiers was two-tone intermodulation
distortion (IMD). This measurement
is done with an input signal
consisting of two unmodulated carriers
spaced 100 kHz apart. Wide bandwidth
modulation formats, as well as widely
spaced carriers, have brought about the
need to design the amplifier circuit so
this measurement can be made using
much wider tone separations. Figure 4
shows IMD, using 10 MHz tone spacing
(f 1 = 2.115 GHz, f 2 = 2.125 GHz), plotted
against output power for several different
quiescent drain bias currents
(IDQ). Figure 5 shows the corresponding
gain for the same variations in quiescent
drain bias current. Also note
that output power for this type of signal
is maximized at a bias current of about
1.0 A.
CDMA and W-CDMA signals produce
distortion products that are
spread across a continuous spectrum of
frequencies. This is observed as spectral
regrowth on either side of the single
carrier band. (See Figure 6.) This
dictates that adjacent channel power
ratio (ACPR), calculated by integrating
the power in 3.84 MHz bandwidths offset
5 MHz from the W-CDMA channel
and dividing by the channel power, is
used rather than IMD as a measure of
linearity. Figure 7 shows ACPR versus
output power for the single-ended
device with a drain bias of 1.3 A. The
device achieves an average output
power of 44.2 dBm (26.4 W) at –45 dBc
ACPR with an efficiency of 21.9%.
Referring to Figure 4, note this bias
point corresponds to two-tone IMD performance
less than –45 dBc for powers
roughly 8 dB or more below P 3dB . This
is important because the peak-to-average
power ratio of these spread-spectrum
signals is in the 10 dB region,
making the two-tone linearity perfor-
Figure 2. The internal configuration of a 155 W
transistor.
Figure 3. Transistor form factor.
20 www.rfdesign.com March 2000

Figure 4. Class-AB two-tone intermodulation
distortion versus output power as a function
of drain bias.
mance of the device in the region 8 dB
to 10 dB below P 3dB a good indicator of
CDMA power capability. Moreover, the
excellent linearity of RF-LDMOS
devices in this so-called “back off”
region contributes to minimizing the
complexity of the total amplifier system
and maximizing system efficiency.
Additional considerations for linearity
performance using wide modulation
bandwidths or widely separated signals
are gain and phase flatness. These
parameters were measured over the
band of 2.11 GHz to 2.17 GHz and
found to be 0.20 dB and 0.42 degrees
respectively.
Furthermore, many W-CDMA base
stations are designed to operate with
several carriers adjacent to one another.
Intermodulation distortion caused by
two spread-spectrum signals is certain to
occur under these conditions, and therefore,
must be quantified if the device linearity
is to be characterized fully.
From a system point of view, two W-
CDMA carriers with a spacing of 10
MHz represent a worst-case situation.
Two W-CDMA carriers at f 1 = 2.1125
GHz and f 2 = 2.1225 GHz were used to
generate the data plotted in Figure 8.
The IMD of the third-order products
(IMD3) is calculated by integrating the
power in 3.84 MHz bandwidths at
2.1325 GHz (IMD3+) and 2.1025 GHz
(IMD3–), and is plotted along with efficiency
and ACPR against output power
Figure 5. Class-AB two-tone power gain versus
output power as a function of drain bias.
in Figure 9. It is clear that the IMD3,
as measured under these conditions,
tracks ACPR. Note that the drain bias
for the two carrier measurement has
been increased to 1.6 A, which is
slightly higher than the 1.3 A used to
achieve the best single carrier W-
CDMA performance. The ACPR reaches
–40 dBc at 44.6 dBm (29.0 W) at
22.9% efficiency, whereas the IMD3
generated between two adjacent multicarrier
stimuli reaches –40 dBc at 43.7
dBm (23.7 W) and 20.5% efficiency.
Choosing which metric to use and the
appropriate bias point should be application-driven.
Output power
While the average power per sector
and/or carrier in W-CDMA systems is
relatively low, the high peak-to-average
ratio of the signal requires transistors
with state-of-the-art, peak power capabilities.
Multicarrier systems require
designers to continually strive for
increased power capability from their
power amplifiers (PA’s). Delivering
transistor solutions that generate larger
and larger amounts of output power
assists designers in achieving this goal.
Output power can be defined under
several different conditions, one of
which is the previously defined P 3dB .
Figure10 shows the constant envelope
or continuous wave (CW) output power
capability of the single-ended design.
The broadband capability of the device,
along with excellent flatness, is further
shown in Figure 11 under conventional
two-tone conditions. Although GSM
base stations operate at elevated average
power levels (because of the constant
envelope nature of the signal),
CDMA and W-CDMA base stations
maintain low average power levels due
to the linearity requirements imposed
by their spread-spectrum nature.
Referring back to Figure 9, an average
power of 23.7 W (or 8.2 dB below
P 3dB ) is achieved under W-CDMA conditions
when a linearity constraint of
IMD3 +/- of –40 dBc or better is used.
Note the continuing reduction in IMD3
with decreasing power illustrating the
excellent linearity properties of the RF-
LDMOS technology. The system
designer must carefully consider the
overall system architecture, including
error correction, to determine the optimum
operating point.
For a given supply voltage, increasing
device size is the most straightforward
method used to increase a
device’s power capability. However,
when a fixed amount of power is
required, caution must be exercised
not to make the device too large or
efficiency will be degraded. An additional
challenge facing the device
designer is ensuring these very high
power devices can achieve the specified
levels of performance when
acceptable levels of circuit impedances
are presented to the I/O terminals. For
the device described in this article, the
layout design of the die incorporates
two large metal bus pads for the drain
and gate connections. These bus pads
allow advanced topology impedance
matching to be designed into the
device package. The resulting
input/output impedances achieved
across the W-CDMA band are shown
in Table 1 (Note the typical Q is 1.8 for
Z in and 1.25 for Z out .
Figure 6. Example of spectral regrowth when
driven by a CDMA signal.
Figure 7. ACPR and drain efficiency for one W-
CDMA carrier versus output power.
Figure 8. Two W-CDMA carriers showing IMD3
and spectral regrowth.
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Drain efficiency
Drain efficiency has always been a
critical parameter for PA devices, mainly
due to thermal management issues that
must be addressed at both the device
and the system levels in such high-power
designs. Referring to Figure 10, the
drain efficiency of the device is plotted
against CW input power. At the P 3dB
point, an efficiency of 49% is achieved.
Under W-CDMA conditions however, the
average power is much lower and highly
dependent on the linearity constraint.
This reveals a direct trade off between
linearity and efficiency. In the previous
section, a constraint of –40 dBc IMD3
was used (see Figure 9) to define an
average power capability of 23.7 W. The
corresponding efficiency is indicated as
20.5%. A higher efficiency operating
point can be achieved by relaxing the linearity
criteria. For example, at –35 dBc
IMD3, output power is 45.1 dBm (32.2
watts) and efficiency has increased to
22.9%. Whether this really improves the
overall system level efficiency must be
carefully evaluated in terms of the additional
error correction required to maintain
the system linearity specification.
Conclusion
RF-LDMOS technology enables the
design of high-power, high-linearity RF
power amplifiers without compromising
system level power conversion efficiency.
Linear amplifiers of this type, using RF-
LDMOS, are believed to be as cost effective
as possible. This article has illustrated
the excellent linearity character-
Figure 9. IMD3, ACPR and drain efficiency for two
W-CDMA carriers vs. output power.
Figure 10. Single-tone output power, gain and
efficiency versus input power.
Figure 11. Broadband two-tone performance.
24 March 2000

Frequency Z in (W) Z out (W)
2.11 GHz 3.81 +j6.85 1.56 -j1.58
2.14 GHz 4.33 +j7.90 1.53 -j1.90
2.17 GHz 4.84 +j8.46 1.48 -j2.26
Table 1. Input and output impedances.
istics of RF-LDMOS at high-power levels
and discussed some of the RF performance
measurements and tradeoffs that
face the system designer in selecting the
optimum operating point for the transistor.
State-of-the-art RF-LDMOS results
have been presented for a single-ended
transistor capable of delivering P3dB
levels of 155 W along with W-CDMA
power levels at –40 dBc IMD3 of 23.7
watts. Further, note that the average W-
CDMA power for the stated linearity criteria
is 8.2 dB below the P 3dB value,
which is nearly identical to the peak to
average ratio of the W-CDMA test signal
used in these measurements.
References
[1] A. Wood, C. Dragon, and W.
Burger, “High Performance Silicon
LDMOS Technology for 2GHz RF
Power Amplifier Applications”, IEDM
Tech. Digest 1996, pp. 87-90.
[2] A. Wood, W. Brakensiek, C.
Dragon, and W. Burger, “120 Watt,
2GHz, Si LDMOS RF Power Transistor
for PCS Base station Applications,
1998 IEEE MTT-S Digest, pp. 707-710.
About the authors
Christopher P. Dragon is a RF
Device Engineer He received his
BSEE (LSU); Masters of Engineering
(ME)in Microelectronic Engineering
(RIT). He can be reached at (480)413-
6887. e-mail Chris.Dragon@
motorola.com.
Bob Davidson is a Member of The
Technical Staf. He received his BSEE
from the University of Illinois atUrbana
in 1975 and MSEE from Illinois
Institute of Technology, Chicago in
1979. He can be reached at (480) 413-
5602. e-mail Bob.Davidson@
motorola.com.
Wayne Burger is a RF LDMOS
Device Engineering Manager. He
received his PhD in Electrical Engineering
from MIT. He can be reached
at (480) 413-6895. e-mail wayne.
burger@motorola.com.
Enver Krvavac is a Technical Staff
Engineer. He can be reached at (480)
413-5644. e-mail r43152@
e-mail sps.mot.com.
Nagaraj Dixit is a RF Application
Engineer. He can be reached at (480)
413-5603. e-mail n.dixit@motorola
.com.
Dale Joersz is RF applications/
Design Technician. He received his
AA in Electronics from Phoenix Institute
of Technology and is currently
persuing a BS in Industrial Engineering
from Arizona State Univeristy. He
can be reached at (480) 413-5638. e-
mail dale.joersz@motorola.com.
All authors are with Motorola’s
Semiconductor Products Sector, Wireless
Infrustructure Systems Division,
Tempe, AZ.
26 March 2000