1 - Al Kossow's Bitsavers

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2-3-14 2-3-15 2-3-16 2-3-17 2-3-18 2-3-19 2-3-20 2-3-21 2-3-22 2-3-23 2-3-24 2-3-25 2-3-26 2-3-27 2-3-28 2-3-29 2-3-30 2-4-1 2-4-2 2-4-3 2-4-4 2-4-5 2-4-6 2-4-7 2-4-8 2-4-9 2-4-10 2-4-11 2-4-12 2-4-13 2-4-14 2-4-15 2-4-16 2-4-17 2-4-18 2-5-1 2-5-2 2-5-3 2-5-4 2-5-5 2-5-6 2-5-7 2-5-8 2-5-9 2-5-10 Data Transmission to 8 Bit Device -- Write Mode (Word Transmission of Even Address) . 1/0 Device Access Circuit . m~A Control Circuit I (Setting of Page Register) . Dt~A Control Circuit II (Internal memory -- 1/0, 8bit) . DMA Control Circuit 111 (Internal memory -- 1/0, 8bit) . DMA Control Circuit IV (Internal memory -- 1/0, 16bit) . Ready Signal Control Circuit . Timing bet\'/een Address Signal and Read/Write Signal . Command Delay Signal Control Circuit . Interrupt Control Circuit . ROr1 Access Circuit . D-RAM Refresh Circuit . RAt,' Parity Check Circuit (Data Write ~lode) . RAt1 Parity Check Clrcuit (Data Read Mode) . Speaker Control Circuit . Keyboard Interface and Other Function Circuit . 1/0 Slot Access Signal . 16450 Chip Select Circuit . 1/0 Address Sel ecti on . Data Output (Printer Data Register Circuit) . Outpu t Data Rea d Ci rcuit . Printer Control Signal Output Circuit . Printer Control Signal Read Circuit . Printer Status Signal Read Circuit . Interrupt Signal Control Circuit . FDD Control Circuit I (FDD -- CPU) . Interrupt Signal and D~'A Request Signal from FDC . FDD Data Write Circuit . FDD Data Read Circuit . VFO Window Circuit . FDD Terminator Function . FDD Cable Setting . Drive Select and Motor On Signal Supply Circuit . FDD Special Signal Cable . Hard Disk Drive Signal Cable •••..•.••••.•..•••..•••••..•. Keyboard Unit Block Diagram . Keyboard Data Output (AT Mode) . Keyboard Data Input (AT t1ode) . Keyboard Data Output (XT Mode) . Interface Circuit . Keyboard Connector Pin Locations . Stroke Characteristics . Typernatic Function . Basic Operation of Mode Indicator Display . Special Functions of Mode Indicator Display . 2-40 2-41 2-44 2-45 2-46 2-47 2-50 2-51 2-52 2-53 2-55 2-57 2-58 2-59 2-60 2-63 2-64 2-65 2-66 2-67 2-67 2-67 2-68 2-68 2-68 2-70 2-70 2-71 2-72 2-73 2-74 2-74 2-75 2-75 2-76 2-77 2-80 2-81 2-81 2-82 2-82 2-83 2-83 2-86 2-86
LIST OF TABlES Table Title Page 2-2-1 2-2-2 2-2-3 2-3-1 2-3-2 2-3-3 2-3-4 2-3-5 2-3-6 2-3-7 2-3-8 2-3-9 2-3-10 2-3-11 2-3-12 2-3-13 2-3-14 2-3-15 2-4-1 2-4-2 2-5-1 2-5-2 2-5-3 2-5-4 2-5-5 2-5-6 2-5-7 2-5-8 2-5-9 2-5-10 2-5-11 2-5-12 2-5-13 2-5-14 2-5-15 2-5-16 2-5-17 2-5-18 2-5-19 2-5-20 2-5-21 2-5-22 Function of Prevention Circuit ............•......•...•... Specification of DC Max Current ......•..•.....••....•.... Power Down Signal Specification ....••...•.•............•• Memory r·1ap ••••••••••••••••••••••••••••••••••••••••••••••• LED Indications ..•.......•...•...............•....•.....• NPX Operation Speed .........•...•....•.•.•....•........•• Oscillator Clock Signal Flow . Reset Signal Generation Methods .....•..••......•......•.. Function of RAfl1 Chips ...•....•..........................• Jumper Connector Function ..................•........••... CPU Data Access Modes .•.................................. Functions of Control Signal on GAATDB ...•...........•.... Explanation of LS612 .•...•..........•....•.........•...•• Wait Cycles ..........•..................................• Wai t Cycl eSel ecti on ...........................•........• Condition of The CDLY Signal Output ......•............... Ava i 1ab 1e ROt,1 Types .•...•............•.......•.....•...•. A20 Signal Control by GAATRF ..•.........•....•....•...... Jumper J9 Setting ..•......•..•.............•....•....•... Difference Between 1.2 MB FDD of SD-581L and FD1155C/t1D5501 . Interface Control ~1ode ..•...•..••........................ Data COJTlllunication r,1ode (AT t1ode) .. Data Comnunication t10de (XT Mode) .. Data Transmission Method and Data Format •......••..••.... Keyboard Connector Pin Function .....•.•...••....•.•.••... Transmission Intervals •..•......•................•.....•. Ove rrun Code s .........••..•..................••....•..... Key Code Make Up ..•...•..•...•...•..•..••..........•....• Condition for Setting and Releasing Numeric Lock .•....•.. Key Stroke Condition ..............•...................... Extension Left and Right Shift Codes •...•.....••....•...• Transmission Sequence of Left and Right Codes Key ....•... Transmitted Code of F16 (break) Key .. Transmitted Code of F14 (Sys Rq) Key . Keyboard Comnands (AT mode) .. Typemati c Rate/Del ay .•.......••..••.....•....•..•.....•.. Opti on Regi ster for Keyboard .........•••..•.....••..•...• Key Code t10de Status .......•...•............•............ Key Code t10de on Option Data . <strong>Al</strong>l Key Typemati c Control .. Commands to The Host Si de .•...•...•..•••.......•••..•..•• Key Scan Code List .........••...•.................•..•... 2-16 2-17 2-18 2-20 2-22 2-22 2-23 2-25 2-28 2-29 2-32 2-32 2-42 2-48 2-49 2-51 2-54 2-62 2-65 2-69 2-78 2-78 2-79 2-80 2-82 2-84 2-84 2-87 2-88 2-88 2-89 2-89 2-90 2-90 2-91 2-92 2-94 2-95 2-95 2-96 2-96 2-97
Page 1 and 2: EPSON pe AX TECHNICAL MANUAL Seiko
Page 3 and 4: PRECAUTIONS Precautlonary notations
Page 5: PREFACE Thls manual descrlbes the t
Page 9: CHAPTER 1 PRODOCT DESCRIPTION TAßL
Page 12 and 13: PRODUCT DESCRIPTION REV.A WX Clock
Page 14 and 15: PRODUCT DESCRlP TION REV.A 1.2.1 Ma
Page 16 and 17: PRODUCT DFßCRIPTION REV.A 1.2.5 D5
Page 18 and 19: PRODUCT DESCRlPTION HEV.A 1.3 HARDW
Page 20 and 21: PRODUCT DESCRIPTION HEV.A TABU 1-3-
Page 22 and 23: PRODUCT DESCRIPTION REV.A FIGURE 1-
Page 24 and 25: 2.3.9 2.3.10 2.3.10.1 2.3.11 2.3.12
Page 29 and 30: REV.A PRINCIPLES OF OPERATION 2.1 H
Page 31 and 32: REV .A PRINCIPLES OF OPERATION 1 D1
Page 33 and 34: REV.A PRINCIPLES OF OPERATION 1) If
Page 35 and 36: REV . B PRINCIPLES OF OPERATION 2.2
Page 37 and 38: REV.A PRINCIPLES OF OPERATION A vol
Page 39 and 40: HEV.A PRINCIPLES OF OPERATION Chara
Page 41 and 42: RKV.A PRINCIPLES OF OPERATION 2.2.2
Page 43 and 44: REV.B PRINCIPLES OF OPERATION +12 +
Page 45 and 46: REV.A PRINCIPLES OF OPERATION TABLE
Page 47 and 48: N I I-' \Q 2 .3 ARTA MAHl CONTROL B
Page 49 and 50: N I N """ 2.3.1 System Clock Genera
Page 51 and 52: N I N W 2.3.1.4 Oscillator There ar
Page 53 and 54: N 2.3.2 System Reset Signal Generat
Page 55 and 56: N +5·5 ~Hls~ CN3~--·"'-" (j flJ5:
Page 57 and 58: t-,) I t-,) ID 2.3.3.3 Jumper Conne
Page 59 and 60: N ( OA TA BUS C~ TO FRO"" RA"" RA""
Page 61 and 62: N I ~ ~ 2.3.4.2 Circuit Operation o
Page 63 and 64: N I ~ To int......l ....ry GAATCK _
Page 65 and 66: MOlS l :;1 MOl l@j { i~~~TRI l READ
Page 67 and 68: N I wIQ - 1. . . I :>
Page 69 and 70: !',) I oll J-I 2.3.5 "C 1/0 Devic
Page 71 and 72: N },. w The LS612 has sixteen 12-bi
Page 73 and 74: N I ~ GAATCK 10 GAATM21 I ino OMA 1
Page 75 and 76: N I 01> -..I GAATCK { CPU GAATM' @
Page 77 and 78:
N I ~ (16-bit bus operation) * NOTE
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N I \Jl ~ 2.3.8 Command Delay Signa
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INT , \ DTR 00 DEN ) t +,5 INT..H C
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N I VI \oll lOG......T... ' TOGur..
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N I VI GAATCK GAATAB GAATRF l5590 a
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N I VI \Cl - _.... -- - ~ AATRF GAA
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N ~,... 2.3.14 Keyboard Interface C
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N ~ IJ,) KID CLK KID DATA GAATCK GA
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REV.A PRINCIPLES OF OPERATION 2.4 M
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HEV.A PRINCIPLES OF OPERATION Data
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REV.A PRINCIPLES OF OPERATION 1.2 M
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REV.A PRINCIPLES OF OPERATION 2.4.3
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REV.B PRINCIPLES OF OPERATION VFO c
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REV.A PRINCIPLES OF OPERATION If DS
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REV .A PRINCIPLES OF OPERATION 2.5
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REV.A PRINCIPLES OF OPERATION 2.5.2
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REV .A PRINCIPLES OF OPERATION T6 ~
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REV .A PRINCIPLES OF OPERATION 2.5.
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REV.A PRINCIPLES OF OPERATION (4) I
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HEV.A PRINCIPLES OF OPERATION 2.5.7
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REV.A PRINCIPLES OF OPERATION ii) E
Page 119 and 120:
REV.A PRINCIPLES OF OPERATION Key C
Page 121 and 122:
REV.A PRINCIPLES OF OPERATION 1) DE
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REV .A PRINCIPLES OF OPERATION (10)
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REV.A PRINCIPLES OF OPERATION (3) B
Page 127:
CHAPTER 3 OPTIONS TAßlE OF CONTENT
Page 131 and 132:
REV.A TROUBLESHOOTIBG 4.1 Service T
Page 133 and 134:
RKV.A TROUBLESHOOTING INSTANCE 1 In
Page 135 and 136:
REV.A TROUBLESHOOTIBG 4.3 RESPONSE
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t PORT 80 01H 04H 05H 06H 07H or 08
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t (3) Error bit pattern (1 second)
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tt-' t-' 22H 23H 25H II GAATIO 8259
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2AH 2BH 8254-2 RAM, GAATIO option b
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t~ I.n (3AH) Unfixed value (Address
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,... I ..... .t:' (3FH) Unfixed v
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ol:l I t \C (45H) WHDC Unfixed
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.p I N ""'" Parity check 1 80000
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Fi gure 5-1-1 5-1-2 5-1-3 5-1-4 5-1
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DIASSEMBLY AND ASSEMBLY HEV.A 5.1.3
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DIASSEMBLY AND ASSEMBLY REV.A 5.1.7
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DIASSKMBLY AN» ASSKMBLY HEV.A 5.1.
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DISASSEMBLY AND ASSEMBLY REV.A 5.1.
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DISASSEKBLY ABO ASSEKBLY REV.A 5.1.
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DISASSEMBLY AND ASSEMBLY REV.A 5.3
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DISASSEMBLY AND ASSEMBLY REV.A 5.3.
Page 171:
CHAPTER 6 ADJUSTMENT AHD MAINTENANC
Page 174 and 175:
7-1-8 Factory Settings (SPFG Board)
Page 176 and 177:
DIAGRAMS AND REFERENCE MATERIALS RE
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DIAGRAKS AHn REFERENCE MATERIALS HE
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Page 182 and 183:
DIAGRAHS AND REFERENCE MATERIALS RE
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Page 186 and 187:
Page 188 and 189:
DIAGRAHS AHn REFERENCE MATERIALS RE
Page 190 and 191:
DIAGRAMS AN» REFERENCE MATERIALS R
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D1AGRAKS AND REFERENCE MATERIALS RE
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DIAGRAMS AHn REFERENCE MATERIALS HE
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Page 198 and 199:
DIAGRAMS AND REFERENCE MATERIALS HE
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Page 202 and 203:
DIAGRAMS AHn REFERENCE MATERIALS RE
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Page 206 and 207:
Page 208 and 209:
Page 210 and 211:
Page 212 and 213:
DIAGRAMS ARD REFERENCE MATERIALS RE
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Page 216 and 217:
Page 218 and 219:
Page 220 and 221:
DIAGRAKS AND REFERENCE MATERIALS HE
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Page 224 and 225:
Page 226 and 227:
DIAGRAMS AB» REFERENCE MATERIALS R
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Page 230 and 231:
Page 232 and 233:
Page 234 and 235:
Page 236 and 237:
Page 238 and 239:
DIAGRAMS AND REFERENCE MATERIALS KE
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Page 242 and 243:
DIAGRAHS AND REFERENCE MATERIALS HE
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Page 246 and 247:
DIAGRAMS AN» REFERENCE MATERIALS H
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Page 250 and 251:
DIAGRAMS AN» REFERENCE MATERIALS H
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Page 254 and 255:
DIAGlU\MS AND REFERENCE MATERIALS H
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Page 258 and 259:
Page 260 and 261:
Page 262 and 263:
Page 264 and 265:
DIAGRAMS ABO REFERENCE MATERIALS RE
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8.1 MAJOR PARTS 8.1.1 Excluding P.C
Page 269 and 270:
8.2 COMPONENT PARTS 8.2.1 ANTA Boar
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Unit Description ANTA Board (6) Mod
Page 273 and 274:
8.2.3 ANT-RMA Board Unit Modificati
Page 275 and 276:
8.2.5 SPFG Board Unit Modification
Page 277 and 278:
8.3.2 ANT-RM/RMA Board Jumper Setti
Page 279 and 280:
8.3.4 WHDC Board Jumper Settings Un
Page 281:
(Xl .... I 01 8.4.2 P.C.B Unit Boar
Page 285 and 286:
1 2 3 4 +5 +5 A B c o E F G H R8 Sl
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1 2 3 4 5 +5 +5 A B c o E F G H R8
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1 2 3 4 5 +5 +5 A B c o E F G H R8
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A B c D E F G H J K L M N o p 4~3 ~
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I T MD 111 I" 13 12 • 11 10 9 •
Page 295:
PG TO POWER SUPPlY UNIT NO CONNECT
Page 298 and 299:
OUTPUT SOCKET ® RIII CI06 O.OI/lF
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T DACK2 2 3 4 t- 0 ...J CJ) Z 0 5 0
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A B c o E F G H 1 2 3 4 5 6 I ọ
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* +5V -r ,,;I: R2 01 ~ J27K + ~ CI
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I A B c o E F G H T 2 3 JI -DRIVE S
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134 132 126 500 \ --- ~ I 103 /~'~3
Page 311 and 312:
EPSON OVERSEAS MARKETING LOCATIONS
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