80960KA EMBEDDED 32-BIT MICROPROCESSOR - Datasheet ...

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80960KA3.0 MECHANICAL DATA3.1. PackagingThe 80960KA is available in two package types:• 132-lead ceramic pin-grid array (PGA). Pins arearranged 0.100 inch (2.54 mm) center-to-center, ina 14 by 14 matrix, three rows around (see Figure17).• 132-lead plastic quad flat pack (PQFP). Thispackage uses fine-pitch gull wing leads arranged ina single row along the package perimeter with0.025 inch (0.64 mm) spacing (see Figure 20).3.1.1. Pin AssignmentThe PGA and PQFP have different pin assignments.Figure 18 shows the view from the PGA bottom (pinsfacing up) and Figure 19 shows a view from the PGAtop (pins facing down). Figure 20 shows the PQFPpackage; Figure 21 shows the PQFP pinout withsignal names. Notice that the pins are numbered inorder from 1 to 132 around the package perimeter.Table 9 and Table 10 list the function of each PGApin; Table 11 and Table 12 list the function of eachPQFP pin.Dimensions for both package types are given in theIntel Packaging handbook (Order #240800).1234567891011121314A B C D E F G H J K L M N PFigure 17. 132-Lead Pin-Grid Array (PGA) Package21
80960KA1234567891011121314PNMLKJHGFEDCBAV CCV SSN.C.DENBE 3DT/RW/RN.C.N.C.N.C.N.C.FAILBE 2READYLAD 30N.C.N.C.V SSV CCV SSV SSBE 0 LOCKBE 1LAD 29 LAD 31 CACHELAD 28 LAD 26 LAD 27ALEADS HLDAN.C.N.C.V SSN.C.N.C.V CCN.C.N.C.N.C.N.C.N.C.N.C.HOLD LAD 25 BADAC V CC V SS LAD 20 LAD 13 LAD 8 LAD 3 V CC V SS INT 3 INT 1 INT 0LAD 23 LAD 24 LAD 22 LAD 21 LAD 18 LAD 15 LAD 12 LAD 10 LAD 6 LAD 2 CLK2 LAD 0 RESET V SSV CC V SS LAD 19LAD 17 LAD 16 LAD 14 LAD 11 LAD 9 LAD 7 LAD 5 LAD 4 LAD 1 INT 2 V CCN.C.N.C.N.C.N.C.N.C.N.C.N.C.N.C.V SSN.C.N.C.V CCN.C.N.C.N.C.V SSV CCN.C.N.C.N.C.N.C.N.C.V CCV SSN.C.V CCN.C.N.C.N.C.N.C.N.C.N.C.V SSN.C.V CCN.C.N.C.N.C.N.C.N.C.N.C.N.C.N.C.N.C.N.C.PNMLKJHGFEDCBA1234567891011121314Figure 18. 80960KA PGA Pinout—View from Bottom (Pins Facing Up)22
Page 3 and 4: CONTENTSFigure 24.Figure 25.Figure
Page 6 and 7: 80960KATable 1. 80960KA Instruction
Page 8 and 9: 80960KApurpose registers provided i
Page 10 and 11: 80960KAdebug instruction. In each c
Page 12 and 13: 80960KABE3:0OO.D.BYTE ENABLE LINES
Page 14 and 15: 80960KA2.3. Connection Recommendati
Page 16 and 17: 80960KATEMP = +22°C@5.5V@5.0V@4.5V
Page 18 and 19: 80960KA2.6. Absolute Maximum Rating
Page 20 and 21: 80960KA2.8.1. AC Specification Tabl
Page 22 and 23: 80960KA1. Clock rise and fall times
Page 26 and 27: 80960KA14 13 12 11 10 9 8 7 6 5 4 3
Page 28 and 29: 80960KA3.2. PinoutTable 9. 80960KA
Page 30 and 31: 80960KATable 11. 80960KA PQFP Pinou
Page 32 and 33: 80960KA3.3. Package Thermal Specifi
Page 34 and 35: 80960KATEMPERATURE ( o C)9085807570
Page 36 and 37: 80960KA4.0 WAVEFORMSFigures 27, 28,
Page 38 and 39: 80960KAT a T w T w T d T w T d T w
Page 40 and 41: 80960KAPREVIOUSCYCLEINTERRUPTACKNOW
Page 42 and 43: 80960KA39

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