Xilinx pg013 LogiCORE IP RGB to YCrCb Color-Space Converter v5 ...

Clock, Enable, and Reset ConsiderationsOutput Clipping NoiseIf coefficients CC and CD in Equation 4-3 are larger than the maximum values calculated inEquation 4-4 and Equation 4-5, Cr and Cb output values may get larger (overflow) than themaximum or smaller (underflow) than minimum value the output representation can carry.If overflow occurs and the design does not have clipping logic (HAS_CLIPPING=0), binaryvalues wrap around and insert substantial noise to the output. If HAS_CLIPPING=1, outputvalues saturate, introducing less noise (Figure 4-4).X-Ref Target - Figure 4-42552400 16Figure 4-4:Wrap-Around and SaturationDS657_08_032408Similarly, clamping logic is included in the design if HAS_CLAMPING=1. Use of clipping andclamping increases slice count of the design by approximately 6*OWIDTH slices.If a targeted standard limits output of values to a predefined range other than those ofbinary representation, such as ITU-R BT.601-5, use of clipping and clamping logic facilitatesconstraining output values. These values are constrained to the predefined range by settingYMAX and YMIN values (constraining luminance), as well as CMAX and CMIN values(constraining chrominance) according to the standard specifications.Clock, Enable, and Reset ConsiderationsACLKThe master and slave AXI4-Stream video interfaces use the ACLK clock signal as their sharedclock reference, as shown in Figure 4-5.RGB to YCrCb Color-Space Converter www.xilinx.com 40PG013 April 24, 2012