130x1g2 - CCSDS

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TM SYNCHRONIZATION AND CHANNEL CODING—SUMMARY OF CONCEPT AND RATIONALEthe theoretical performance bounds on codes constrained to have a given block length. ThusTurbo codes can also offer good performance for applications requiring small block sizes onthe order of a few hundreds of bits (but these block sizes are not within the scope of theRecommended Standard (reference [3])).7.2 TURBO ENCODERA Turbo encoder is a combination of two simple encoders. The input is a frame of kinformation bits. The two component encoders generate parity symbols from two simplerecursive convolutional codes, each with a small number of states. The information bits arealso sent uncoded. An interleaver permutes bit-wise the original k information bits beforeinput to the second encoder. A generic implementation block diagram for a Turbo encoder isshown in figure 7-2. The specific Turbo encoder in the CCSDS RecommendedStandard (reference [3]) is shown in more detail in figure 7-3.Figure 7-2: Block Diagram of Turbo EncoderCCSDS 130.1-G-2 Page 7-2 November 2012
TM SYNCHRONIZATION AND CHANNEL CODING—SUMMARY OF CONCEPT AND RATIONALEFigure 7-3: CCSDS Turbo Encoder Block DiagramThe two convolutional encoders in the Recommended Standard (reference [3]) are recursivewith constraint length K = 5, and are realized by feedback shift registers. However, unlike theencoder for the recommended plain convolutional code in section 4, the Turbo codeword isterminated by running each encoder for additional K-1 bit times beyond the end of theinformation bit frame. After encoding the last bit in the frame, the leftmost adder in eachcomponent encoder receives two copies of the same feedback bit, causing it to ‘zero’ itsoutput. After K-1 more bit times, all 4 memory cells become filled with ‘zeros’, but in theinterim the encoder continues to output nonzero encoded symbols.The Recommended Standard (reference [3]) allows options for non-punctured codes withrates between 1/3, 1/4, and 1/6. The puncturer is used only for code rate 1/2.The interleaver in the Recommended Standard (reference [3]) is based on a permutation rulewhich can be computed on-the-fly or pre-computed and stored in a look-up table, for allallowable frame lengths (1784 to 16384 bits).In figure 7-3, CLK indicates the frame clock. It is used: (1) by the input buffer to determinewhen to empty and refill the buffer; (2) by the output buffer/multiplexer to determine whento insert the frame sync marker; (3) by each of the convolutional encoders to determine whento terminate the codeword. It should be noted that an entire information block of k bits mustbe read in before the encoding can proceed, because some of the bits in the tail end of blockwill be permuted to the front and need to be encoded first. Thus there is a fundamentalencoding latency of at least k bits in the encoding process.CCSDS 130.1-G-2 Page 7-3 November 2012
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