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130x1g2 - CCSDS

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BER & FERTM SYNCHRONIZATION AND CHANNEL CODING—SUMMARY OF CONCEPT AND RATIONALEFigure 7-10 shows the simulated performance of Turbo codes of rates 1/2, 1/3, 1/4, and 1/6with an information block length of 16384 bits. These performance curves do not necessarilyreflect the performance of the <strong>CCSDS</strong> codes for this block length since the recommendedinterleaver for this block length has not been specified yet.10 -310 -410 -610 0 E b /N o (dB)Bock size = 1638410 -110 -2FERBERrate 1/3rate 1/6rate 1/210 -5rate 1/410 -710 -8-0 .4-0 .3-0 .2-0 .1-0 .00.10.20.30.40.50.60.70.80.91.01.11.2Figure 7-10: BER and FER Performance for Rate 1/2, 1/4, 1/3 and 1/6 Turbo Codes,Block Size 16384 Bits, Software Simulation, 10 IterationsFigure 7-11 illustrates how the decoder’s average speed can be increased through the use ofstopping rules.Speed (Kbps)1000800600400Frame Error Rate = 10 -489201/617841/689201/317841/317841/233.33.754.3567.5Average Number of Iterations10 iterations fixed10200-0.5 0 0.5 1 1.5 2 2.5E b /N o (dB)15Figure 7-11: Illustration of Decoder Speedup Using Stopping Rules<strong>CCSDS</strong> 130.1-G-2 Page 7-10 November 2012

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