Burr Brown PCM1738 - 24-Bit, 192kHz Sampling.pdf - MaxDat

MODE CONTROL REGISTERSUser-Programmable Mode ControlsThe PCM1738 includes a number of user-programmablefunctions that are accessed via mode control registers. Theregisters are programmed using the Serial Control Interfacethat was previously discussed in this data sheet. Table II liststhe available mode control functions, along with their resetdefault conditions and associated register index.Register MapThe mode control register map is shown in Table III. Eachregister includes a W/R bit that indicates whether a registerread (W/R = 1) or write (W/R = 0) operation is performed.FUNCTION DEFAULT REGISTER BITFUNCTIONS AVAILABLE FOR BOTH WRITE AND READDigital Attenuation Control 0dB Register 16 for L-Channel ATL[7:0]0dB to –120dB in 0.5dB Steps Register 17 for R-Channel ATR[7:0]Attenuation Load Control Attenuation Disabled 18 ATLDDisable, EnableAttenuation Speed Selection x1f S 19 ATS[1:0]x1f S , x1/2f S , x1/4f S , x1/8f SSoft Mute Control Mute Disabled 18 MUTEMute Disable, EnableInfinite Zero Mute Control Disabled 19 INZDDisable, EnableInput Audio Data Format Selection 16-Bit Standard Format 18 FMT[2:0]16-, 20-, 24-Bit Standard (Right Justified) Format24-Bit MSB-First Left-Justified Format16-, 24-Bit I 2 S FormatDe-Emphasis Control De-Emphasis Disabled 18 DMEDisable, EnableSampling Rate Selection for De-Emphasis De-Emphasis Disabled 18 DMF[1:0]Disable, 44.1kHz, 48kHz, 32kHzDigital Filter Roll-Off Selection Sharp Roll-Off 19 FLTSharp Roll-Off, Slow Roll-OffOutput Phase Reversal Normal 19 REVNormal. ReverseDAC Operation Control DAC Operation Enabled 19 OPEEnable, DisabledSystem Clock (SCKO) Output Control Output Enabled 19 CLKEOutput Enable, DisableSystem Clock (SCKO) Rate Control SCKI 19 CLKDSCKI, SCKI/2System Reset Control Normal Operation 20 SRSTReset Operation, Normal OperationMode Register Reset Control Normal Operation 20 MRSTReset Operation, Normal OperationDigital-Filter Bypass Control DF Enabled 20 DFTHDF Enable, DF BypassDelta-Sigma Oversampling Rate Selection x64f S 20 OS[1:0]x64f S , x128f S , x32f SDelta-Sigma Order Selection Third Order 20 DSOSThird-Order, Fifth-OrderMonaural Mode Selection Stereo 20 MONOStereo, MonauralChannel Selection for Monaural Mode Data L-Channel 20 CHSLL-Channel, R-ChannelFUNCTIONS AVAILABLE ONLY FOR READZero Detection Flag Not Zero = 0 21 ZFGL for L-ChannelNot Zero, Zero Detected Zero Detected = 1 21 ZFGR for R-ChannelTABLE II. User-Programmable Mode Controls.REGISTER B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B016 W/R 0 0 1 0 0 0 0 ATL7 ATL6 ATL5 ATL4 ATL3 ATL2 ATL1 ATL017 W/R 0 0 1 0 0 0 1 ATR7 ATR6 ATR5 ATR4 ATR3 ATR2 ATR1 ATR018 W/R 0 0 1 0 0 1 0 ATLD FMT2 FMT1 FMT0 DMF1 DMF0 DME MUTE19 W/R 0 0 1 0 0 1 1 REV ATS1 ATS0 OPE CLKD CLKE FLT INZD20 W/R 0 0 1 0 1 0 0 DSOS SRST MRST DFTH MONO CHSL OS1 OS021 R 0 0 1 0 1 0 1 RSV RSV RSV RSV RSV RSV ZFGR ZFGLNOTE: (1) RSV in Register 21 is assigned for factory test operation.TABLE III. Mode Control Register Map.16PCM1738SBAS174A