Burr Brown PCM1738 - 24-Bit, 192kHz Sampling.pdf - MaxDat

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APPLICATION FOR DSD FORMAT (DSD MODE) INTERFACE1RSTV CC 3282ZEROLAGND2273ZERORI OUT L–26Always Set LOW4N/AI OUT L+25DATA-L5DATALV CC 224Bit Clock (n • f S )Always Set LOW678N/ABCKDGNDV CC 1V COM 3I REF232221AnalogOutput StageSame as StandardApplication9V DDV COM 220DSD Decoder10SCKOV COM 11911MDOAGND11812MDII OUT R+17ModeControl13MCI OUT R–1614CSDATAR15DATA-RFIGURE 11. Connection Diagram for DSD Format Interface.FEATURESThis mode is utilized for interfacing directly to a DSDdecoder, found in Super Audio CD (SACD) applications.DSD Mode provides a low-pass filtering function to convertthe 1-bit oversampled data stream to the analog domain. Thefiltering is provided using an Analog FIR filter structure.Four FIR responses are available and may be selected via theserial control interface. Refer to the Typical PerformanceCurves section of this data sheet for Analog FIR plots. SeeFigures 1 and 2 for interface timing and specification, andFigures 17 and 18 for timing and interface specification inDSD mode.PIN ASSIGNMENT WHEN IN DSDFORMAT INTERFACESeveral pins are redefined for DSD Mode operation. Theseinclude:• DATA (Pin 5) ➔ DATAL, L-Channel DSD Data Input• MUTE (Pin 15) ➔ DATAR, R-Channel DSD Data Input• SCKI (Pin 7) ➔ Bit Clock (BCK) for DSD Data (64 x 44.1kHz)• LRCK (Pin 4) ➔ Set LOW• BCK (Pin 6) ➔ Set LOWTypical connection to a DSD decoder is shown in Figure 11.26PCM1738SBAS174A
DSD MODE CONFIGURATION AND FUNCTION CONTROLSConfiguration for DSD Interface mode:• DFTH = 1 (Register 20)• DME = 1 (Register 18)Table V shows the register mapping available in DSD Mode.REGISTER B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B016 W/R 0 0 1 0 0 0 0 – – – – – – – –17 W/R 0 0 1 0 0 0 1 – – – – – – – –18 W/R 0 0 1 0 0 1 0 – – – – DMF1 DMF0 DME (1) –19 W/R 0 0 1 0 0 1 1 – – – OPE CLKD CLKE – –20 W/R 0 0 1 0 1 0 0 RSV SRST MRST DFTH (1) RSV RSV OS1 OS021 R 0 0 1 0 1 0 1 RSV RSV RSV RSV RSV RSV – –NOTE: (1) This bit is required for selection of the external Digital Filter mode. (2) “–” = function disabled.TABLE V. Register Mapping in DSD Mode.DMF[1:0]Analog FIR Performance SelectionThese bits are available for Read/Write.Default Value: 00DMF[1:0] Analog FIR Performance Select00 DSD Filter 101 DSD Filter 210 DSD Filter 311 DSD Filter 4Plots for the four Analog FIR filter responses are shown in the Typical Performance Curves of this data sheet.OS[1:0]Analog FIR Operation Speed Select SelectionThese bits are available for Read/Write.Default Value: 00OS[1:0] Operation Speed Select00 f SCKI (default)01 Reserved10 Reserved11 f SCKI /2The OS bit in the DSD mode is used to select the operating rate of analog FIR.REQUIREMENTS FOR SYSTEM CLOCKThe bit clock (BCK) for DSD Mode is required at pin 7 of the PCM1738. The frequency of the bit clock may be N times ofthe sampling frequency. Generally, N is 64 in DSD application.The interface timing between the bit clock, DATAL, and DATAR is required to meet the same setup and hold timespecifications as shown for the PCM Audio format interface in Figure 5.PCM1738 27SBAS174A
Page 2 and 3: SPECIFICATIONSAll specifications at
Page 4 and 5: V CC 1BLOCK DIAGRAMLRCKDATABCKInput
Page 6 and 7: TYPICAL PERFORMANCE CURVES (Cont.)A
Page 8 and 9: TYPICAL PERFORMANCE CURVES (Cont.)A
Page 10 and 11: ANALOG FIR FILTER PERFORMANCE FOR D
Page 12 and 13: t RSTReset Reset RemovalV DD2.4V/ma
Page 14 and 15: LRCK50% of V DDt BCH t BCL t LBBCK5
Page 16 and 17: MODE CONTROL REGISTERSUser-Programm
Page 18 and 19: REGISTER 18 (Cont.)FMT[2:0] Audio I
Page 20 and 21: REGISTER 19 (Cont.)FLTDigital Filte
Page 22 and 23: B15 B14 B13 B12 B11 B10 B9 B8 B7 B6
Page 24 and 25: APPLICATION FOR EXTERNAL DIGITAL FI
Page 28 and 29: APPLICATION FOR MONAURAL MODE OPERA
Page 30 and 31: CONSIDERATIONS FORAPPLICATIONS CIRC
Page 32: IMPORTANT NOTICETexas Instruments a

Burr Brown PCM1738 - 24-Bit, 192kHz Sampling.pdf - MaxDat

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