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SSI73K212LBell 212A/1 03Single-Chip ModemELECTRICAL SPECIFICATION (Continued)DYNAMIC CHARACTERISTICS AND TIMING (Continued)PARAMETERSTiming (Refer to Timing Diagrams)TALTLATLCTCLTRDTLLTRDFTRWTWWTOWTWOTCKDTCKWTDCKTACTCATWHCONDITIONSCSI Addr. setup before ALE lowCS/Addr. hold after ALE lowALE low to RD/WR lowRD/WR Control to ALE highData out from RD lowALE widthData float after RD highRDwidthWRwidthData setup before WR highData hold after WR highData out after EXCLK lowWR after EXCLK lowData setup before EXCLK lowAddress setup before control**Address hold after control**Data Hold after EXCLK* Maximum time applies to parallel version only.** Control for setup is the falling edge of RD or WR.Control for hold is the falling edge of RD or the rising edge of WR.MIN NOM MAX UNITS30 ns20 ns40---ns10 ns0 160--ns60 ns0-80 ns200 25000 ns140 25000* ns.. _-150 ns20 ns200 ns--150 nsf----150 ns------50 ns50 ns20 ns3-18