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Actel FPGAs - MSC Budapest Kft.

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Axcelerator Family of <strong>FPGAs</strong>High Performance System IntegrationThe latest antifuse FPGA family offered by <strong>Actel</strong>, Axcelerator, offers highperformance and unprecedented design security at densities of up to 2 millionequivalent system gates. Based upon the <strong>Actel</strong> AX architecture, Axcelerator hasseveral system-level features, such as embedded SRAM (with embedded FIFOcontrol logic), PLLs, segmentable clocks, chip-wide highway routing, and carrylogic. Based upon 0.15 µ, seven-layers-of-metal CMOS antifuse process technology,Axcelerator offers a level of performance previously only available inASIC technology.n 350 MHz system performancen 500+ MHz internal performancen 500+ MHz embedded FIFOsn PLL output up to 1 GHz and8 PLLs per devicen 6 levels of logic at 156+ MHzn 1.5 V, 1.8 V, 2.5 V, and 3.3 Vmixed-voltage operationn 8 I/O banks per devicen 8 global clocks per devicen 4.5 kbits variable-aspect RAMblocks with built-in FIFO controln Intelligent low-power operationn Secure programming technologyprevents reverse engineeringand design theftAX125 AX250 AX500 AX1000 AX2000System Gates 125,000 250,000 500,000 1,000,000 2,000,000Dedicated Registers 672 1,408 2,688 6,048 10,752Max. Registers (core) 1,344 2,816 5,376 12,096 21,504Embedded RAM Bits 18,432 55,296 73,728 165,888 294,912Embedded RAMBlocks (4,608 bits)4 12 16 36 64Max. User I/Os 168 248 336 516 684Max. Number ofLVDS Pairs84 124 168 258 342PLLs 8 8 8 8 8Global Clocks 8 8 8 8 8PackagesCS180FG256FG324PQ208PQ208FG256FG484 FG484 FG484FG676FG676FG896BG729FG896FG115213

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