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Timing and Transients in Digital Circuits - Integrated Systems ...

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1 What you will learnComputer science views digital circuits as ideal mach<strong>in</strong>es <strong>and</strong> describes their behavior us<strong>in</strong>g mathematicalmodels such as f<strong>in</strong>ite state mach<strong>in</strong>es <strong>and</strong> computer arithmetics. While such abstractions arevalid <strong>and</strong> useful given certa<strong>in</strong> preconditions, they omit a number of effects that impact real circuits.The most important simplifications relate to transients <strong>and</strong> delays that come from the fact that noelectrical node can change its state <strong>in</strong> zero time <strong>and</strong> no physical signal can propagate <strong>in</strong> zero time.Gett<strong>in</strong>g the tim<strong>in</strong>g right is absolutely essential when design<strong>in</strong>g a digital circuit, if that circuit is meant tobehave <strong>in</strong> the same way as its mathematical or computer model. Several lessons of our VLSI coursewill be devoted to data throughput, tim<strong>in</strong>g constra<strong>in</strong>ts, tradeoffs between time <strong>and</strong> energy, clock<strong>in</strong>gdiscipl<strong>in</strong>es, sychronization, metastability, <strong>and</strong> other tim<strong>in</strong>g-related issues.This warm-up exercise is here to make sure you are aware of the fundamental concepts <strong>and</strong> quantitiesrequired to underst<strong>and</strong> that material <strong>and</strong> to become an expert user of electronic design automation(EDA) software. More specifically, we will show you• How to capture the time-wise behavior of digital (sub)circuits.• Visual formalisms that help analyze tim<strong>in</strong>g issues.• The very basics of synchronous circuit operation <strong>and</strong> simulation set up.• What determ<strong>in</strong>es the maximum frequency at which a circuit can be clocked.• The dependencies <strong>in</strong>troduced by signals enter<strong>in</strong>g or depart<strong>in</strong>g from a circuit.• Th<strong>in</strong>gs to watch out for when design<strong>in</strong>g control logic <strong>and</strong> state mach<strong>in</strong>es.2 Terms <strong>and</strong> Concepts2.1 <strong>Transients</strong> <strong>in</strong> digital circuitsAll circuits discussed here are digital <strong>and</strong> make use of two-valued signals. For practical reasons,the voltage levels that represent 0 <strong>and</strong> 1 respectively must be separated by some “forbidden” <strong>in</strong>tervalwhere a signal has no mean<strong>in</strong>gful b<strong>in</strong>ary <strong>in</strong>terpretation <strong>and</strong> must be considered as logically undef<strong>in</strong>edor <strong>in</strong>valid. In accordance with the IEEE 1164 st<strong>and</strong>ard, we use the symbol X to denote situationswhere a signal is electrically driven but has no known logic value. Note that any signal that switchesfrom 0 to 1 or vice versa will transit through the forbidden <strong>in</strong>terval for a brief lapse of time.Some signals may even rock back <strong>and</strong> forth a few times or exihibit short-lived voltage excursionsbefore eventually reach<strong>in</strong>g their steady-state condition. As expla<strong>in</strong>ed <strong>in</strong> appendix A.5 “Transient behaviorof logic circuits” of our textbook 1 even circuits of just a few gates must be suspected to developsuch spurious <strong>and</strong> unwanted signals, known as hazards, unless one has proof to the contrary.2.2 Comb<strong>in</strong>ational, sequential, <strong>and</strong> sychronous circuitsA digital circuit is qualified as comb<strong>in</strong>ational if its present output gets determ<strong>in</strong>ed by its present<strong>in</strong>put exclusively when <strong>in</strong> steady-state condition. This contrasts with sequential logic the output ofwhich depends not only on present but also on past <strong>in</strong>put values. Sequential circuits must, therefore,necessarily keep their state <strong>in</strong> some k<strong>in</strong>d of storage elements whereas comb<strong>in</strong>ational ones have no1Hubert Kaesl<strong>in</strong>, “<strong>Digital</strong> <strong>Integrated</strong> Circuit Design, from VLSI Architectures to CMOS Fabrication”, CambridgeUniversity Press, 2008.2

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