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MCP3421 - Microchip

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<strong>MCP3421</strong>4.0 DESCRIPTION OF DEVICEOPERATION4.1 General OverviewThe <strong>MCP3421</strong> is a low-power, 18-Bit Delta-Sigma A/Dconverter with an I 2 C serial interface. The devicecontains an on-board voltage reference (2.048V),programmable gain amplifier (PGA), and internaloscillator. When the device powers up (POR is set), itautomatically resets the configuration bits to defaultsettings.Device default settings are:• Conversion bit resolution: 12 bits (240 sps)• PGA gain setting: x1• Continuous conversionOnce the device is powered-up, the user canreprogram the configuration bits using I 2 C serialinterface any time. The configuration bits are stored involatile memory.User selectable options are:• Conversion bit resolution: 12, 14, 16, or 18 bits• PGA Gain selection: x1, x2, x4, or x8• Continuous or one-shot conversionIn the Continuous Conversion mode, the deviceconverts the inputs continuously. While in the One-ShotConversion mode, the device converts the input onetime and stays in the low-power standby mode until itreceives another command for a new conversion.During the standby mode, the device consumes lessthan 1 µA maximum.4.2 Power-On-Reset (POR)The device contains an internal Power-On-Reset(POR) circuit that monitors power supply voltage (V DD )during operation. This circuit ensures correct devicestart-up at system power-up and power-down events.The POR has built-in hysteresis and a timer to give ahigh degree of immunity to potential ripples and noiseson the power supply. A 0.1 µF decoupling capacitorshould be mounted as close as possible to the V DD pinfor additional transient immunity.The threshold voltage is set at 2.2V with a tolerance ofapproximately ±5%. If the supply voltage falls belowthis threshold, the device will be held in a resetcondition. The typical hysteresis value is approximately200 mV.The POR circuit is shut-down during the low-powerstandby mode. Once a power-up event has occurred,the device requires additional delay time(approximately 300 µs) before a conversion can takeplace. During this time, all internal analog circuitries aresettled before the first conversion occurs. Figure 4-1illustrates the conditions for power-up and power-downevents under typical start-up conditions.When the device powers up, it automatically resetsand sets the configuration bits to default settings. Thedefault configuration bit conditions are a PGA gain of1 V/V and a conversion speed of 240 SPS inContinuous Conversion mode. When the devicereceives an I 2 C General Call Reset command, itperforms an internal reset similar to a Power-On-Resetevent.V DD2.2V2.0VFIGURE 4-1:300 µSReset Start-up Normal Operation ResetPOR Operation.4.3 Internal Voltage ReferenceThe device contains an on-board 2.048V voltagereference. This reference voltage is for internal useonly and not directly measurable. The specifications ofthe reference voltage are part of the device’s gain anddrift specifications. Therefore, there is no separatespecification for the on-board reference.4.4 Analog Input ChannelTimeThe differential analog input channel has a switchedcapacitor structure. The internal sampling capacitor(3.2 pF for PGA = 1) is charged and discharged toprocess a conversion. The charging and discharging ofthe input sampling capacitor creates dynamic inputcurrents at each input pin. The current is a function ofthe differential input voltages, and inverselyproportional to the internal sampling capacitance,sampling frequency, and PGA setting.© 2009 <strong>Microchip</strong> Technology Inc. DS22003E-page 11

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