SH564128FH8N0QHSCR - Itautec

SH564128FH8N0QHSCRApril 11, 2011IDD and IDDQ Measurement-Loop Patterns TimingSpeed BinDDR3-1333Parameter 9-9-9Unitst CKmin (IDD) 1.5 nsCL(IDD) 9 nCKnRCD 9 nCKnRC 33 nCKnRAS 24 nCKnRP 9 nCKnFAW 20 nCKnRRD 4 nCKnRFC 107 nCKDefinitions for IDD Measurement Conditions• “0” and “LOW” is defined as V IN ≤ V ILAC(max) .• “1” and “HIGH” is defined as V IN ≥ V IHAC(min) .• “MID-LEVEL” is defined as inputs that are V REF = V DD /2.• Timings used for IDD and IDDQ Measurement-Loop Patterns are provided in IDD and IDDQ Timings onpage 22.• Basic IDD and IDDQ Measurement Conditions are described in IDD Measurement Conditions on pages 23-25.• Detailed IDD and IDDQ Measurement-Loop Patterns are described in IDD Measurement-Loop Patterns onpages 26-31.• IDD Measurements are done after properly initializing the DDR3 SDRAM. This includes but is not limited to setting:RON = RZQ/7 (34 Ohm in MR1);Qoff = 0 B (Output Buffer enabled in MR1);RTT_Nom = RZQ/6 (40 Ohm in MR1);RTT_Wr = RZQ/2 (120 Ohm in MR2);TDQS Feature disabled in MR1.• Attention: The IDD and IDDQ Measurement-Loop Patterns need to be executed at least one time beforeactual IDD or IDDQ measurement is started.• Define D = {CS, RAS, CAS, WE}: = {HIGH, LOW, LOW, LOW}• Define D = {CS, RAS, CAS, WE}: = {HIGH, HIGH, HIGH, HIGH}Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.comEurope: 5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757Asia/Pacific: Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-399290322