MC95FR464_DS_REV2.0_20120104.pdf - ABOV Semiconductor

MC95FR332/432/364/4647.8 USART CHARACTERISTICSThe following table and figure show the timing codition of USART in SPI or Synchronous mode ofoperation. The usart is one of peripherals in MC95FR332/432/364/464. NOTE1 .(VDD =3.0V±10%, VSS =0V, TA=-40~+85℃)Parameter Symbol NOTE2 MIN MAX UnitSystem clock period t SCLK 100 1000 nsClock (XCK) period t XCK 4 1028 t SCLKClock (XCK) high time t XCKH 2 514 t SCLKClock (XCK) low time t XCKL 2 514 t SCLKLead timeMasterSlaveLag timeMasterSlaveData setup time (inputs)MasterSlaveData hold time (inputs)MasterSlaveData setup time (outputs)MasterSlaveData hold time (outputs)MasterSlavet LEADt LEADt LAGt LAGt SIMt SISt HIMt HISt SOMt SOSt HOMt HOS0.5 t XCK2 t SCLK0.5 t XCK2 t SCLK22101022-10-100.5 t XCK ns-0.5 t XCK ns-Disable time t DIS 1 2 t SCLKTable 7-8 Timing characteristics of USART in SYNC. or SPI mode of operations22--22--t SCLKnst SCLKnsNOTE1 In synchronous mode, Lead and Lag time with respect to SS pin is ignored. And the case of UCPHA=0 isalso applied to SPI mode only.NOTE2 All timing is shown with respect to 20% VDD and 80% VDD.26 January, 2012 Rev.2.0