MC95FR464_DS_REV2.0_20120104.pdf - ABOV Semiconductor

MC95FR332/432/364/464the MCS-51 Micro Assembler User‟s Guide). Each register bank contains 8 one-byte registers, 0through 7.Reset initializes the Stack Pointer to location 07 H and it is incremented once to start from location 08 Hwhich is the first register (R0) of the second register bank. Thus, in order to use more than oneregister bank, the SP should be initialized to a different location of the RAM where it is not used fordata storage (ie, higher part of the RAM).Bit Addressable Area 16 bytes have been assigned for this segment, 20 H ~2F H . Each one of the 128bits of this segment can be directly addressed (00 H ~7F H ).The bits can be referred to in two ways both of which are acceptable by the ASM-51. One way is torefer to their addresses, ie. 00 H to 7F H . The other way is with reference to bytes 20 H to 2F H . Thus, bits0 H ~7 H can also be referred to as bits 20.0~20.7, and bits 8 H ~F H are the same as 21.0~21.7 and so on.Scratch Pad Area Bytes 30 H through 7F H are available to the user as data RAM. However, if thestack pointer has been initialized to this area, enough number of bytes should be left aside to preventSP data destruction.8.2.3 Special Function RegistersAll I/O and peripherals operation for the MC95FR332/432/364/464 accessed via Special FunctionRegisters (SFRs). These registers occupy direct Internal Data Memory space locations in the range80 H to FF H . Their names and addresses are given in the Table 8.9. Note these SFRs are implementedusing flip-flops within the core, not as RAM.The MC95FR332/432/364/464 has special registers which are provided by M8051 core. These areProgram Counter(PC), Accumulator(A), B register(B), the Stack Pointer(SP), the Program StatusWord(PSW), general purpose register(R0~R7) and DPTR (Data pointer register).NOTE There‟s some address space in the SFRs which are not implemented. Reading these address space mayreturn arbitrary value, and writing to thesee reserved SFR address may result in un-expected operation. Socautions are needed when accessing reserved address.Accumulator (ACC) This register provides one of the operands for most ALU operations. It isdenoted as „A‟ in the instruction table included later in this document. On reset this register returns00 H .B register (B) This register provides the second operand for multiply or divide instructions. Otherwise,it may be used as a scratch pad register. On reset this register returns 00 H .Stack Pointer (SP) The SP register contains the Stack Pointer. The Stack Pointer is used to load theprogram counter into Internal Data Memory during LCALL and ACALL instructions and to retrieve theprogram counter from memory during RET and RETI instructions. Data may also be saved on orretrieved from the stack using PUSH and POP instructions. Instructions that manipulate the stackautomatically pre-increment or post-decrement the Stack Pointer so that the Stack Pointer alwayspoints to the last byte written to the stack, i.e. the top of the stack. On reset the Stack Pointer is set to07 H .It falls to the programmer to ensure that the location of the stack in Internal Data Memory does notinterfere with other data stored therein.Program Counter (PC) The Program Counter consists of two 8-bit registers PCH and PCL. Thiscounter indicates the address of the next instruction to be executed. On reset, the program counter isinitialized to reset routine address (PCH:00 H , PCL:00 H ).34 January, 2012 Rev.2.0