LMX9830 Bluetooth™ Serial Port Module

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LMX98308.0 Functional Description (Continued)8.1.8 Access.bus interfaceIn case the firmware is configured by the option pins to usean access.bus or i 2 c compatible EEPROM, the LMX9830will activate that interface and try to read out data from theEEPROM. The external memory needs to be compatible tothe reference listed in Table 11 on page 14.The largest size EEPROM supported is limited by theaddressing format of the selected NVM. The device musthave a page size equal to N x 32 bytes.The device uses a 16 bit address format. The deviceaddress must be “000”.Table 11. 24C64 EEPROM 8kx8ParameterValueSupplierAtmelSupply Voltage 1 2.7 - 5.5 VInterface 2 wire serial interfaceMemory Size 8K x 8, 64kbitClock Rate 1 100 KHzAccess32 Byte Page Write Mode1. Parameter range reduced to requirements of Nationalreference design8.2 TRANSPORT PORT - UARTThe LMX9830 provides one Universal AsynchronousReceiver Transmitter (UART). The UART interface consistsout of Receive (RX), Transmit (TX), Ready-to-Send (RTS)and Clear-to-Send signals. RTS and CTS are used forhardware handshaking between the host and theLMX9830. Since the LMX9830 acts as gateway betweenthe bluetooth and the UART interface, National Semiconductorrecommends to use the handshaking signals especiallyfor transparent operation. In case two signals areused CTS needs to be pulled to GND. Please refer also to“LMX9830 Software User’s Guide” for detailed informationon 2-wire operation.The UART interface supports formats of 8-bit data with orwithout parity, with one or two stop bits. It can operate atstandard baud rates from 2400bits/s up to a maximumbaud rate of 921.6kbits/s. DMA transfers are supported toallow for fast processor independent receive and transmitoperation.The UART baudrate is configured during startup by checkingoption pins OP3, OP4 and OP5 for reference clock andbaudrate. In case Auto baud rate detect is chosen, thefirmware check the NVS area if a valid UART baudrate hasbeen stored in a previous session. In case, no useful valuecan be found the device will switch to auto baud rate detectionand wait for an incoming reference signal.The UART offers wakeup from the power save modes viathe multi-input wakeup module. When the LMX9830 is inlow power mode, RTS# and CTS# can function asHost_WakeUp and Bluetooth_WakeUp respectively. Table12 on page 14 represents the operational modes supportedby the firmware for implementing the transport viathe UART.Table 12. UART Operation ModesItem Range Default at Power-Up With Auto-DetectBaud Rate 2.4 to 921.6 kbits/s Either configured by option pins, NVS 2.4 to 921.6 kbits/sparameter or auto baud rate detectionFlow Control RTS#/CTS# or None RTS#/CTS# RTS#/CTS#Parity Odd, Even, None None NoneStop Bits 1,2 1 1Data Bits 8 8 88.3 AUDIO PORT8.3.1 Advanced Audio InterfaceThe Advanced Audio Interface (AAI) is an advanced versionof the Synchronous Serial Interface (SSI) that providesa full-duplex communications port to a variety ofindustry-standard 13/14/15/16-bit linear or 8-bit log PCMcodecs, DSPs, and other serial audio devices.The interface allows the support one codec or interface.The firmware selects the desired audio path and interfaceconfiguration by a parameter that is located in RAM(imported from non-volatile storage or programmed duringboot-up). The audio path options include the MotorolaMC145483 codec, the OKI MSM7717 codec, the WinbondW681360/W681310 codecs and the PCM slave throughthe AAI.In case an external codec or DSP is used the LMX9830audio interface generates the necessary bit and frameclock driving the interface.Table 13 on page 15 summarizes the audio path selectionand the configuration of the audio interface at the specificmodes.The LMX9830 supports one SCO link.www.national.com 14
8.0 Functional Description (Continued).Table 13. Audio path configurationLMX9830Audio setting Interface Freq FormatAAI BitClockAAI FrameClockAAI Frame SyncPulse LengthOKIMSM7717Advanced audiointerfaceANY 18-bit log PCM(a-law only)480 KHz 8 KHz 14 BitsMotorolaMC145483 2Advanced audiointerface13-bit linear 480 KHz 8 KHz 13 BitsOKIMSM7717Advanced audiointerface13MHz8-bit log PCM(a-law only)520 KHz 8 KHz 14 BitsMotorolaMC145483 3Advanced audiointerface13-bit linear 520 KHz 8 KHz 13 BitsWinbondW681310Advanced audiointerface13MHz8 bit log PCMA-law and u-law520 KHz 8 KHz 14 BitsWinbondW681360Advanced audiointerface13MHz 13-bit linear 520 KHz 8 KHz 13 BitsPCM slave 4Advanced audiointerfaceANY 1 8/16 bits 128 - 1024KHz8 KHz 8/16 Bits1. For supported frequencies see Table 22 on page 242. Due to internal clock divider limitations the optimum of 512KHz, 8KHz can not be reached. The values are set to thebest possible values. The clock mismatch does not result in any discernible loss in audio quality.3. Due to internal clock divider limitations the optimum of 512KHz, 8KHz can not be reached. The values are set to thebest possible values. The clock mismatch does not result in any discernible loss in audio quality.4. In PCM slave mode, parameters are stored in NVS. Bit clock and frame clock must be generated by the host interface.PCM slave configuration example: PCM slave uses the slot 0, 1 slot per frame, 16 bit linear mode, long frame sync, normalframe sync. In this case, 0x03E0 should be stored in NVS. See “LMX9830 Software User’s Guide” for more details.8.4 AUXILIARY PORTS8.4.1 RESET#There are two reset inputs: RESET_RA# for the radio andRESET_BB# for the baseband. Both are active low.There is also a reset output, B_RESET_RA# (BufferedRadio Reset) active low. This output follows inputRESET_RA#.When RESET_RA# is released, going high,B_RESET_RA# stays low until the clock has started.Please see Section 8.5 "System Power Up" on page 15 fordetails.8.4.2 General Purpose I/OsThe LMX9830 offers 3 pins which either can be used asindication and configuration pins or can be used for GeneralPurpose functionality. The selection is made out of settingsderived out of the power up sequence.In General Purpose configuration the pins are controlledhardware specific commands giving the ability to set thedirection, set them to high or low or enable a weak pull-up.In alternate function the pins have pre-defined indicationfunctionality. Please see Table 14 on page 15 for a descriptionon the alternate indication functionality.Table 14. Alternate GPIO pin configurationPinOP4/PG4PG6PG7DescriptionOperation Mode pin to configure TransportLayer settings during boot-upGPIORF Traffic indication8.5 SYSTEM POWER UPIn order to correctly power-up the LMX9830 the followingsequence is recommended to be performed:Apply VCC_IO and VCC to the LMX9830.The RESET_RA# should be driven high. ThenRESET_BB# should be driven high at a recommendedtime of 1ms after the LMX9830 voltage rails are high. TheLMX9830 is properly reset.Please see timing diagram, Figure 9 on page 16.15 www.national.com
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