MCP3550/1/3 - Microchip

MCP3550/1/33.0 PIN DESCRIPTIONSThe descriptions of the pins are listed in Table 3-1.TABLE 3-1: PIN FUNCTION TABLEMCP3550/1/3Symbol I/O/P DescriptionMSOP, SOIC1 V REF I Reference Voltage Analog Input Pin2 V IN + I Non-inverting Analog Input Pin3 V IN - I Inverting Analog Input Pin4 V SS P Ground Pin5 SCK I Serial Clock Digital Input Pin6 SDO/RDY O Data/Ready Digital Output Pin7 CS I Chip Select Digital Input Pin8 V DD P Positive Supply Voltage PinType Identification: I = Input; O = Output; P = Power3.1 Voltage Reference (V REF )The MCP3550/1/3 devices accept single-endedreference voltages from 0.1V to V DD . Since theconverter output noise is dominated by thermal noise,which is independent of the reference voltage, theoutput noise is not significantly improved bydiminishing the reference voltage at the V REF input pin.A reduced voltage reference will significantly improvethe INL performance (see Figure 2-4); the INL maxerror is proportional to V REF 2 .3.2 Analog Inputs (V IN +, V IN -)The MCP3550/1/3 devices accept a fully differentialanalog input voltage to be connected on the V IN + andV IN - input pins. The differential voltage that isconverted is defined by V IN = V IN + – V IN -. Thedifferential voltage range specified for ensuredaccuracy is from -V REF to +V REF . However, theconverter will still output valid and usable codes withthe inputs overranged by up to 12% (see Section 5.0“Serial Interface”) at room temperature. Thisoverrange is clearly specified by two overload bits inthe output code.The absolute voltage range on these input pins extendsfrom V SS – 0.3V to V DD + 0.3V. Any voltage above orbelow this range will create leakage currents throughthe Electrostatic Discharge (ESD) diodes. This currentwill increase exponentially, degrading the accuracy andnoise performance of the device. The common mode ofthe analog inputs should be chosen such that both thedifferential analog input range and the absolute voltagerange on each pin are within the specified operatingrange defined in Section 1.0 “ElectricalCharacteristics”.3.3 Supply Voltage (V DD , V SS )V DD is the power supply pin for the analog and digitalcircuitry within the MCP3550/1/3. This pin requires anappropriate bypass capacitor of 0.1 µF. The voltage onthis pin should be maintained in the 2.7V to 5.5V rangefor specified operation. V SS is the ground pin and thecurrent return path for both analog and digital circuitryof the MCP3550/1/3. If an analog ground plane isavailable, it is recommended that this device be tied tothe analog ground plane of the Printed Circuit Board(PCB).3.4 Serial Clock (SCK)SCK synchronizes data communication with thedevice. The device operates in both SPI mode 1,1 andSPI mode 0,0. Data is shifted out of the device on thefalling edge of SCK. Data is latched in on the risingedge of SCK. During CS high times, the SCK pin canidle either high or low.3.5 Data Output (SDO/RDY)SDO/RDY is the output data pin for the device. Once aconversion is complete, this pin will go active-low,acting as a ready flag. Subsequent falling clock edgeswill then place the 24-bit data word (two overflow bitsand 22 bits of data, see Section 5.0 “SerialInterface”) on the SPI bus through the SDO pin. Datais clocked out on the falling edge of SCK.© 2009 Microchip Technology Inc. DS21950E-page 13