MCP3550/1/3 - Microchip

MCP3550/1/34.0 DEVICE OVERVIEWThe MCP3550/1/3 devices are 22-bit delta-sigmaADCs that include fully differential analog inputs, athird-order delta-sigma modulator, a fourth-ordermodified SINC decimation filter, an on-chip, low-noiseinternal oscillator, a power supply monitoring circuit andan SPI 3-wire digital interface. These devices can beeasily used to measure low-frequency, low-levelsignals such as those found in pressure transducers,temperature, strain gauge, industrial control or processcontrol applications. The power supply range for thisproduct family is 2.7V to 5.5V; the temperature range is-40°C to +125°C. The functional block diagram for theMCP3550/1/3 devices is shown in Figure 4-1.A Power-On Reset (POR) monitoring circuit is includedto ensure proper power supply voltages during theconversion process. The clock source for the part isinternally generated to ±0.5% over the full-powersupply voltage range and industrial temperature range.This stable clock source allows for superior conversionrepeatability and minimal drift across conversions.The MCP3550/1/3 devices employ a delta-sigmaconversion technique to realize up to 22 bits of nomissing code performance with 21.9 Effective Numberof Bits (ENOB). These devices provide single-cycleconversions with no digital filter settling time. Everyconversion includes an internal offset and gain autocalibrationto reduce device error. These calibrationsare transparent to the user and are done in real-timeduring the conversion. Therefore, these devices do notrequire any additional time or conversion to proceed,allowing easy usage of the devices for multiplexedapplications. The MCP3550/1/3 devices incorporate afourth-order digital decimation filter in order to allowsuperior averaging performance, as well as excellentline frequency rejection capabilities. The oversamplingfrequency also reduces any external anti-aliasing filterrequirements.The MCP3550/1/3 devices communicate with a simple3-wire SPI interface. The interface controls theconversion start event, with an added feature of anauto-conversion at system power-up by tying the CSpin to logic-low. The device can communicate with busspeeds of up to 5 MHz, with 50 pF capacitive loading.The interface offers two conversion modes: SingleConversion mode for multiplexed applications and aContinuous Conversion mode for multiple conversionsin series. Every conversion is independent of eachother. That is, all internal registers are flushed betweenconversions. When the device is not converting, it automaticallygoes into Shutdown mode and, while in thismode, consumes less than 1 µA.ReferenceInputDifferentialAnalog InputGain andOffsetCalibrationChargeTransferThird-OrderΔΣModulatorBitStreamDigitalDecimationFilter (SINC 4 )ConversionCodeSPI 3-wireInterfaceOutputCodeClockInternalOscillatorFIGURE 4-1:MCP3550/1/3 Functional Block Diagram.© 2009 Microchip Technology Inc. DS21950E-page 15