Marvell ARMADA 16x Applications Processor Family

Marvell ® ARMADA 16x Applications Processor Family
Version 3.2.x Boot ROM Reference Manual
3.4.3 DDR Packages
The following optional DDR packages queue the Boot ROM to set up DDR based on the supplied
parameters or register values.
3.4.3.1 Configure Memory Controller Control (CMCC Package)
The Package ID (PID) for this package is ASCII-encoded hexadecimal value 0x434d4343, which
represents CMCC in ASCII.The number of bytes in the package is next which is 8, plus 8 bytes for
each KeyID/value pair (see Table 8). Reference the following code.
CMCCSpecList_T:
unsigned long PID;
int NumBytes;
CMCCSpec_T CMCCSpecs[1];
CMCCSpec_T:
unsigned long KeyId;
unsigned long KeyValue;
Table 8:
CMCC KeyId / Value pairs
KeyId
CMCC_CONFIG_ENA_ID
CMCC_MEMTEST_ENA_ID
CMCC_CONSUMER_ID
3.4.3.2 DDRC (Custom) Package
The DDR Custom package allows setting of selected MCU registers directly.
The Package ID (PID) for this package is ASCII-encoded hexadecimal value 0x44445243, which
represents DDRC in ASCII.The number of bytes in the package is next which is 8, plus 8 bytes for
each KeyID/value pair. Reference the following code.
DDRCSpecList_T:
unsigned long PID;
int NumBytes;
DDRCSpec_T DDRCSpecs[1];
Value
0 = Do Not Initialize DDR
1 = Initialize DDR
0 = Do Not Test Memory
1 = Test Memory
This is the Consumer ID.
It must equal 0x54425249 “TBRI” to indicate that the Boot ROM is
to look for and use any of the various DDR packages that may be
present in the NTIM.
DDRCSpec_T:
unsigned long KeyId;
unsigned long KeyValue;
Memory Controller registers that are supported in this Boot ROM are listed in Table 9 and show a
Register ID in the right-hand column as used in the Marvell Boot Utility to select a register. The offset
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
Doc. No. MV-S301208-00 Rev. - Copyright © 11/15/10 Marvell
Page 26
November 2010 PUBLIC RELEASE