Marvell ARMADA 16x Applications Processor Family
Marvell ARMADA 16x Applications Processor Family
Marvell ARMADA 16x Applications Processor Family
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<strong>Marvell</strong> ® <strong>ARMADA</strong> <strong>16x</strong> <strong>Applications</strong> <strong>Processor</strong> <strong>Family</strong> Hardware Manual<br />
Table 8:<br />
LPDDR1/LPDDR2 Input, Output and I/O pins AC/DC Operating Conditions (Continued)<br />
Symbols Description Min Typical Max Unit Notes<br />
NOTE:<br />
1. IOH (min) = 13.4 mA<br />
2. Measurement conditions VDDIO=1.8V, ZPDRV=ZNDRV=0xF, ZPR=ZNR=0xF, ZD=1<br />
3. Refer to the Functional Description section in the DDR Memory Controller chapter in the <strong>Marvell</strong> ® <strong>ARMADA</strong> <strong>16x</strong><br />
<strong>Applications</strong> <strong>Processor</strong> <strong>Family</strong> Software Manual for ODT configuration.<br />
4. Measurement definition for RTT:<br />
Apply VREF +/- 0.25 to input pin separately, then measure current I(VREF + 0.25) and I(VREF - 0.25) respectively.<br />
Current does not include the current flowing through the pullup/pulldown resistor.<br />
5. RTT = 0.5 / (I (VREF + 0.25) - I (VREF - 0.25) )<br />
6. Input DC Operating Conditions (SSTL receiver)<br />
V IH overshoot: V IH (max) = VDD_M + 0.7V for a pulse width less than or equal to 3ns and the pulse width can not be<br />
greater than 1/3 the cycle rate.<br />
V IL undershoot: V IL (min) = -1.0V for a pulse width less than or equal to 3ns and the pulse width can not be greater<br />
than 1/3 the cycle rate<br />
Where VDD_M