Hardware/Software Introduction Chapter 1 Introduction

Integrating logic design and physical design
• Past
– Gate delay much greater than wire delay
– Thus, performance evaluated as # of levels
of gates only
• Today
– Gate delay shrinking as feature size
shrinking
– Wire delay increasing
• Performance evaluation needs wire length
– Transistor placement (needed for wire
length) domain of physical design
– Thus, simultaneous logic synthesis and
physical design required for efficient
circuits
Delay
Reduced feature size
Wire
Transistor
Embedded Systems Design: A Unified
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
59