128-Bit Addressing in RISC-V and Security
Tue1530-128bit-Addr-RISC-V-Wallach-Micron
Tue1530-128bit-Addr-RISC-V-Wallach-Micron
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Memory Management<br />
• Each object can have its OWN<br />
memory management structure<br />
– Page Tables<br />
– Hashed Indices<br />
– PGAS like<br />
• There is NO ACCESS bits<br />
associated with the management<br />
of storage (e.g., read, write,<br />
execute, etc..)<br />
– Management is separate from<br />
protecRon<br />
• Each object can choose to have<br />
object size for constra<strong>in</strong>t access<br />
check<strong>in</strong>g (bounds check).<br />
2016 _NOV _<strong>RISC</strong>V_WORKSHOP<br />
19
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