Computer Science & Electrical Engineering 2012 - McGraw-Hill Books

Computer Science
correction)
6. General purpose I/O and pin configuration, especially in
system-on-chip processors
7. Modern buses including I2C, SPI, LVDS etc... Evolved
PC/104 systems
8. The use of memory management unit (MMU) in diskless
embedded systems
9. Soft core processors – including an entire chapter in which
we design and build our own
10. System-on-chip processors, application-specific ICs and
field programmable gate arrays (FPGAs)
Apart of the main items in the typical computer architecture theory
curriculum relevant to embedded engineers, the book offers a wealth
of practical information including the opportunity to build and test out
a custom soft-core processor.
Topics are placed into an academic framework that not only
discusses the how and what, but also the why. Plenty of diagrams
are given to explain tricky concepts and many explanatory boxes
(containing extra worked examples, interesting snippets of information
and additional explanations) are provided throughout to augment
the main text.
SI units are used throughout, including the newer “kibibyte” and
“mebibyte” measures for computer memory.
Each chapter ends with a set of 20 problems (with answers
provided in the instructors’ manual).
Supplementary materials:
Solution manuals (with detail explanations to end-of-chapter problems
in the textbook), powerpoint slides, diagrams, extra teaching material
(including recommendations for further reading), ready-made laboratory
sessions are available for instructors on the instructors’ website.
These supplement materials are available only to instructors using
the textbook for their teaching purposes. Please contact your local
McGraw-Hill sales representatives if you require further assistance.
Contents
Preface
Acknowledgements
Chapter 1Introduction
1.1 Book organisation
1.2 Evolution
1.3 Computer generations
1.4 Cloud, pervasive, grid and massively parallel computers
1.5 Where to from here?
1.6 Summary
Chapter 2Foundations
2.1 Computer organisation
2.2 Computer fundamentals
2.3 Number formats
2.4 Arithmetic
2.5 Multiplication
2.6 Division
2.7 Working with fractional number formats
2.8 Floating point
2.9 Floating point processing
2.10 Summary
Chapter 3CPU Basics
3.1 What is a computer?
3.2 Making the computer work for you
3.3 Instruction handling
3.4 Data handling
3.5 A top down view
3.6 Summary
Chapter 4Processor Internals
4.1 Internal bus architecture
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4.2 Arithmetic logic unit
4.3 Memory management unit
4.4 Cache
4.5 Co-processors
4.6 Floating point unit
4.7 Streaming SIMD Extensions (SSE) and Multimedia Extensions
(MMX)
4.8 Co-processing in embedded systems
4.9 Summary
Chapter 5Enhancing CPU Performance
5.1 Speedups
5.2 Pipelining
5.3 Complex and reduced instruction set computer
5.4 Superscalar architectures
5.5 Instructions per cycle
5.6 Hardcore acceleration
5.7 Branch prediction
5.8 Parallel machines
5.9 Tomasulo’s algorithm
5.10 Summary
Chapter 6Externals
6.1 Interfacing using a bus
6.2 Parallel bus specifications
6.3 Standard interfaces
6.4 Real-time issues
6.5 Interrupts and interrupt handling
6.6 Wireless
6.7 Summary
Chapter 7Practical Embedded CPUs
7.1 Introduction
7.2 Microprocessors are core plus more
7.3 Required functionality
7.4 Clocking
7.5 Clocks and power
7.6 Memory
7.7 Pages and overlays
7.8 Memory in embedded systems
7.9 Test and verification
7.10 Error detection and correction
7.11 Watchdog timers and reset supervision
7.12 Reverse engineering
7.13 Preventing reverse engineering
7.14 Summary
Chapter 8CPU Design
8.1 Soft core processors
8.2 Hardware software co-design
8.3 Off-the-shelf cores
8.4 Making our own
8.5 CPU design specification
8.6 Instruction set
8.7 CPU implementation
8.8 CPU testing and operation
8.9 CPU programming and use
8.10 Summary
Chapter 9The Future
9.1 Single bit architectures
9.2 Very long instruction word architectures
9.3 Parallel and massively-parallel machines
9.4 Asynchromous processors
9.5 Alternative number format systems
9.6 Optical computation
9.7 Science fiction or future reality?
9.8 Summary
A Standard Notation for Memory Size
B Open Systems Interconnection (OSI) Model
B.1 Introduction
B.2 The OSI layers
B.3 Summary
C Exploring Trade-offs in Cache Size and Arrangment
C.1 Introduction
C.2 Preparation