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worldmags<br />

worldmags<br />

Rate the eM8<br />

Part 2 By Fred Eady<br />

You can’t build robot smarts if you can’t speak the language. Or, in this case,<br />

speak the languages. We’re about to continue our port of the eM8 assembler<br />

application to CCS C. Although this is a tutorial of sorts, we’re also forming a<br />

picture of the eM8 hardware as we translate the assembler source code. When<br />

we ran out of paper last time, we had just finished porting the PIC16F882<br />

definitions <strong>and</strong> SRAM allocations. At this point, we’re ready to port some eM8<br />

executable code.<br />

Start<br />

Assembler-based embedded programs don’t have to<br />

house their code inside the braces of the C main function.<br />

However, from a porting st<strong>and</strong>point, the assembler code<br />

behind the START label will be rounded up <strong>and</strong> placed<br />

within a pair of CCS C braces. We don’t have to port the<br />

RESET code, but I thought it might be a good idea to show<br />

you how the assembler application kicks off following a<br />

microcontroller reset:<br />

;——————————————————————————————————————<br />

; Start Of Program after Reset<br />

;——————————————————————————————————————<br />

RESET ORG 0x000 ; processor reset<br />

; vector<br />

GOTO START ; go to beginning of<br />

; program<br />

The interrupt h<strong>and</strong>ler code lies between the RESET<br />

label <strong>and</strong> the START label in the original eM8 source. We’ll<br />

deal with the interrupt h<strong>and</strong>ler port in due time. For now,<br />

let’s dig into the oscillator setup:<br />

START<br />

;******* Set Oscillator Factoty Correction<br />

BANKSEL OSCTUNE ; select bank 1<br />

; using mpasm macro<br />

MOVLW 0x00 ; set oscillator to<br />

; factory calibrated freq<br />

MOVWF OSCTUNE<br />

BANKSEL OSCCON<br />

BSF OSCCON,IRCF0<br />

; set osc to 8M operation<br />

BANKSEL STATUS ; select bank 0 using mpasm<br />

; macro<br />

clrf UF<br />

clrf CF<br />

We already know that the PIC16F882 is clocked from<br />

its internal oscillator. So, according to the PIC16F882<br />

datasheet, the OSCTUNE register will reset with a value of<br />

38 SERVO 12.2010<br />

0x00 which does not apply any frequency correction to the<br />

default clock frequency of 4 MHz. At this point, there is no<br />

reason to adjust the instruction clock frequency. However,<br />

we do need to set up the internal oscillator to run at 8<br />

MHz. As for setting the internal oscillator base frequency,<br />

CCS C provides a couple of ways for us to specify the<br />

instruction execution rate. The first method is found in the<br />

em8.h include file that is created by the CCS C PIC Wizard:<br />

#use delay(clock=8000000)<br />

The CCS C #use delay directive sets the necessary bits<br />

in the associated SFRs (Special Function Registers) to select<br />

an internal oscillator speed of 8 MHz. As you can see in the<br />

eM8 assembler source, bit IRCF0 in SFR OSCCON is set to<br />

complete the bit pattern necessary to initiate 8 MHz<br />

internal oscillator operation. Here’s method number two<br />

which happens to be a CCS C built-in function that resides<br />

inside of the C main function:<br />

setup_oscillator(OSC_8MHZ);<br />

It doesn’t hurt to specify the internal oscillator<br />

frequency more than once. However, the most recently<br />

encountered frequency statement sets the operating clock<br />

speed.<br />

The eM8 application also clears the flags in this<br />

assembler code snippet <strong>and</strong> so will we. The original eM8<br />

assembler source allocated an eight-bit SRAM location for<br />

each set of flags. We did the same but in a CCS C kind of<br />

way. The results of clearing the UF <strong>and</strong> CF flag structures<br />

are shown in Screenshot 1. The CCS C code that cleared<br />

the bits in Screenshot 1 looks like this:<br />

UF = 0;<br />

CF = 0;<br />

The eM8 assembler source makes provisions for<br />

Versions 1 <strong>and</strong> 2:

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