10-Gigabit Ethernet Switch Performance Testing - Ixia

What Is Inside a
Multi-10GE Port
Switch?
Testing the new generation of 10GE
switches requires a clear understanding of
the various building blocks that make up a
switch, and their interaction, to determine
the various stress points within a switch
and identify the weakest link in the chain.
Figure 1 shows the major components of a
10GE switch, including the line card, the
switch fabric card, and the controller card.
The following subsections provide an
overview of the 10GE switch/router
components crucial to performance
testing.
Packet buffer
The packet buffer is a temporary repository
for arriving packets while they wait to be
processed.
Packet processing function
The packet processor is an optimized ASIC
or programmable device (Network
Processing Unit, or NPU) for processing
and forwarding packets in the data plane
or fast path. It performs specific key tasks
such as parsing the header, pattern
matching or classification, table look-ups,
packet modification, and packet
forwarding, ideally at wire speed.
Classification tables
The classification table is a special
memory used by the packet processor. It
may contain the following databases:
•The routing table determines where to
route incoming packets.
• Access Control Lists (ACLs) contain
information to grant or deny
permission to specific users or groups
•The flow classification table contains
information about a particular user or
group of users, protocols, and
applications. Flow identification
information is used to determine QoS
treatment, packet policing, and perflow
queuing and billing.
•The label table contains information
about VLANs, stacked VLANs, MPLS
labels, etc.
Context memory
Context memory contains instructions
about whether to deny or forward packets,
where to forward them, all the internal
system headers needed to get a packet
from an ingress to an egress port, and the
external packet header (new MAC, IP,
MPLS stacks, etc.). It also holds
information relevant to metering the
packet and other miscellaneous
information about how to process a
packet.
Traffic management function
The traffic management function is used
to regulate the flow of traffic. It forwards
traffic according to a user-defined set of
rules pertaining to priority levels, latency
and bandwidth guarantees, and
congestion levels. It also provides the
buffering required to work with any
queuing mechanisms it uses to manage
traffic flow across the switch fabric. It may
also include the high-speed SERDES
(serializer/deserializer) function used to
connect to the switch fabric.
Switch fabric
The switch fabric provides data plane
interconnection among all line cards in the
system. The switch fabric typically employs
a crossbar to move packets between its
ingress and egress ports. An NxN crossbar
switch fabric allows N line cards in a
system to be interconnected in a chassis.
This allows each slot to simultaneously
send and receive traffic over the switch
fabric.
10-Gigabit Ethernet Switch Performance Testing Copyright © 2004, Ixia 7