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EE 675 Advanced Microprocessors ARM – A little history

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<strong>ARM</strong> register bank floorplan<br />

• Enable lines run vertically and data busses run horizontally<br />

• Decoders are more complex that the register cells but horizontal<br />

pitch is matched to register cells<br />

Vdd<br />

Vss<br />

ALU<br />

bus<br />

PC<br />

bus<br />

INC<br />

bus<br />

PC<br />

A bus read decoders<br />

B bus read decoders<br />

write decoders<br />

register cells<br />

ALU<br />

bus<br />

A bus<br />

B bus<br />

<strong>EE</strong> <strong>675</strong> @ SDSU 43<br />

<strong>ARM</strong> core datapath buses<br />

• Datapath pitch is chosen as a compromise between the complex<br />

functions (ALU) and simpler functions (barrel shifter)<br />

• Space is also allocated for the passage of passenger buses<br />

Ad<br />

PC inc<br />

shift out<br />

W<br />

instruction<br />

Din<br />

A B<br />

address register<br />

incrementer<br />

register bank<br />

multiplier<br />

ALU<br />

shifter<br />

data in<br />

instruction pipe<br />

data out<br />

<strong>EE</strong> <strong>675</strong> @ SDSU 44<br />

22

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