System Control Blocks

Offset
Bytes and Field
Alignment N arne
16 (10) 1 DCBBQFLG
x •• x xxxx
. 1 ..
•• 1.
17 (11) • 1 DCBWTEOM
18 (12) •• 1 DCBWTEOT
19 (13) . 1 DCBWTPAD
20 (14) 1 DCBBUFNO
21 (15) 3 · DCBBUFCB
24 (18) 2 DCBBUFL
26 (lA) · . 2 DCBDSORG
Byte 1
26 (lA) xxx. xxxx
. • • 1
27 (lB) Byte 2
28 (lC) 1 DCBDEVTP
29 (lD) ·
3 DCBIOBAD
32 (20) 1 DCBHIARC, DCBBFTEK
x. .. . x ..
o. .. .0 ••
0 ••.• 1 ••
1. •. • o ••
.xxx •• xx
x •••
1 •..
DATA CONTROL BLOCK -- BTAM
Field Description, Contents, Meaning
WTTA INTERFACE
WTTA flag byte.
(Reserved tits)
WRU feature to be used •
lAM feature to be used •
The EOM character.
The EOT character.
Number of pad (LTRS) characters required for motor-on
delay.
COMMON INTEHFACE
Number of tuffers obtained by the OPEN routine.
Range: 0-255
Address of the buffer pool control block.
Buffer length. Range: 0 - 32,760 bytes
Data set organization being used:
(Reserved bits)
ex Telecommunications -- line grouf •
Reserved.
94 OS System Control Blocks (Release 21.7)
Index to the device entry in the device I/O
directory.
Base for addressing lOBS.
(Base = Address of first lOB minus length of an lOB)
FOUNDATION EXTENSION
Buffer pool location, coded in the DCB macro
instruction:
Before OPEN -
none No choice made in the DCB macro instruction.
After OPEN -
If no choice is made in the DD statement either
(as shown by the JFCBHIAR field), the OPEN
routine resets these two bits from 00 to 01.
o Hierarchy 0 main storage.
(See also: After OPEN, above.)
1 Hierarchy 1 main storage.
(Reserved bits.)
Buffering Technique:
D Dynamic buffering.