Analog CMOS Integrated Circuit Design Set 2 - Courses - University ...
Analog CMOS Integrated Circuit Design Set 2 - Courses - University ...
Analog CMOS Integrated Circuit Design Set 2 - Courses - University ...
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
SM<br />
Channel Length Modulation - 3<br />
Example:<br />
Given all other parameters constant, plot ID-VDS characteristic of an NMOS<br />
for L=L1 and L=2L1 • In Triode Region:<br />
• In Saturation Region:<br />
W<br />
ID<br />
≈ μn<br />
⋅Cox<br />
⋅<br />
L<br />
∂ID<br />
W<br />
Therefore : ∝<br />
∂VDS<br />
L<br />
1<br />
⋅[<br />
( VGS<br />
−VTH<br />
) ⋅VDS<br />
− ⋅V<br />
2<br />
DS]<br />
1 W<br />
ID<br />
≈ μnCox<br />
GS TH<br />
2 L<br />
∂I<br />
1 W<br />
So we get : D = μnCox<br />
∂VDS<br />
2 L<br />
∂ID<br />
W ⋅ λ W<br />
Therefore : ∝ ∝<br />
∂V<br />
L 2<br />
DS L<br />
2<br />
( V −V<br />
) ⋅ ( 1+<br />
λ ⋅V<br />
)<br />
EECE 488 – <strong>Set</strong> 2: Background<br />
( V −V<br />
)<br />
SM 18<br />
GS<br />
DS<br />
2<br />
TH ⋅ λ<br />
• Changing the length of the device from L 1 to 2L 1 will flatten the I D-V DS<br />
curves (slope will be divided by two in triode and by four in saturation).<br />
• Increasing L will make a transistor a better current source, while<br />
degrading its current capability.<br />
• Increasing W will improve the current capability.<br />
SM<br />
Sub-threshold Conduction<br />
• If V GS < V TH, the drain current is not zero.<br />
• The MOS transistors behave similar to BJTs.<br />
• In BJT:<br />
• In MOS: I<br />
I = I ⋅ e<br />
C<br />
D<br />
= I<br />
S<br />
0<br />
⋅ e<br />
VBE<br />
VT<br />
VGS<br />
ζ ⋅VT<br />
• As shown in the figure, in MOS transistors, the drain current drops by<br />
one decade for approximately each 80mV of drop in V GS.<br />
• In BJT devices the current drops faster (one decade for approximately<br />
each 60mv of drop in V GS).<br />
• This current is known as sub-threshold or weak-inversion conduction.<br />
EECE 488 – <strong>Set</strong> 2: Background<br />
2<br />
35<br />
36