Analog CMOS Integrated Circuit Design Set 2 - Courses - University ...
Analog CMOS Integrated Circuit Design Set 2 - Courses - University ...
Analog CMOS Integrated Circuit Design Set 2 - Courses - University ...
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SM<br />
Device Capacitances - 5<br />
In Saturation:<br />
• The channel isolates the gate from the substrate. The voltage across<br />
the channel varies which can be accounted for by adding two<br />
equivalent capacitances to the source. One is between source and<br />
gate, and is equal to two thirds of C1. The other is between source and<br />
bulk, and is equal to two thirds of C2. 1. CGS: 2<br />
CGS = Cov<br />
+ C1<br />
3<br />
2. CGD: C C =<br />
SM<br />
GD<br />
3. CGB: the channel isolates the gate from the substrate.<br />
4.<br />
5.<br />
CSB: CDB: 2<br />
CSB = C5<br />
+ C2<br />
3<br />
• In summary:<br />
C GS<br />
C GD<br />
C GB<br />
C SB<br />
C DB<br />
C DB = C6<br />
ov<br />
EECE 488 – <strong>Set</strong> 2: Background<br />
Device Capacitances - 6<br />
Cut-off<br />
C ⋅C<br />
C<br />
Cov<br />
EECE 488 – <strong>Set</strong> 2: Background<br />
SM 26<br />
Triode<br />
C1<br />
Cov +<br />
2<br />
C<br />
Cov +<br />
2<br />
CGB<br />
= 0<br />
Saturation<br />
Cov +<br />
Cov ov C<br />
1<br />
1 2 CGB<br />
C1<br />
1 C2<br />
〈 〈<br />
+<br />
C5<br />
C6<br />
0<br />
C2<br />
C 5 +<br />
2<br />
C2<br />
C 6 +<br />
2<br />
0<br />
2<br />
C1<br />
3<br />
2<br />
C 5 + C<br />
3<br />
C6<br />
2<br />
51<br />
52
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