FM3 MB9B500 Series - Microcontrollers - Fujitsu

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MB9B500 Series ・ Synchronous serial(SPI = 0, SCINV = 1) (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Vcc 4.5V Vcc 4.5V Pin name Conditions Min Max Min Max Unit Serial clock cycle time tSCYC SCKx 4tcycp - 4tcycp - ns SCK SOT delay time tSHOVI SCKx SOTx -30 +30 - 20 + 20 ns SIN SCK setup time tIVSLI SCKx SINx 50 - 30 - ns SCK SIN hold time tSLIXI SCKx Internal shift clock operation SINx 0 - 0 - ns Serial clock "L" pulse width tSLSH SCKx 2tcycp - 10 - 2tcycp - 10 - ns Serial clock "H" pulse width tSHSL SCKx tcycp + 10 - tcycp + 10 - ns SCK SOT delay time tSHOVE SCKx SIN SCK setup time SOTx tIVSLE - 50 - 30 ns SCKx SINx 10 - 10 - ns SCK SIN hold time tSLIXE SCKx External shift clock operation SINx 20 - 20 - ns SCK fall time tF SCKx - 5 - 5 ns SCK rise time tR SCKx - 5 - 5 ns Notes: ・The above characteristics apply to CLK synchronous mode. ・tCYCP indicates the peripheral clock cycle time. ・These characteristics only guarantee the same relocate port number. For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed. ・When the external load capacitance = 50pF. 80 DS706-00010-1v0-E
S C K S O T S IN S C K S O T S IN VO H V IL DS706-00010-1v0-E tR tSHO VI VIH tSH OVE VOH VOL V OH tS HSL tSCYC VOL t IVSLI tSLIX I VIH VIH VIL MS bit=0 VIH tF M S b it= 1 VIL VIL tIVSLE tSLIXE MB9B500 Series tSLSH VIL 81
Page 1 and 2:
FUJITSU SEMICONDUCTOR DATA SHEET Co
Page 3 and 4:
MB9B500 Series Multi-function Seri
Page 5 and 6:
Dual Timer (Two 32/16bit Down Count
Page 7 and 8:
PRODUCT LINEUP MB9B500 Series Memo
Page 9 and 10:
PIN ASSIGNMENT FPT-100P-M20/M23 VS
Page 11 and 12:
BGA-112P-M04 MB9B500 Series ・ Th
Page 13 and 14:
Pin no. LQFP-100 BGA-112 LQFP-120 D
Page 15 and 16:
Page 17 and 18:
Page 19 and 20:
Page 21 and 22:
Page 23 and 24:
Page 25 and 26:
MB9B500 Series SIGNAL DESCRIPTION
Page 27 and 28:
MB9B500 Series The number after the
Page 29 and 30: MB9B500 Series The number after the
Page 41 and 42: MB9B500 Series Type Circuit Remarks
Page 43 and 44: MB9B500 Series Type Circuit Remarks
Page 45 and 46: MB9B500 Series PRECAUTIONS FOR HAN
Page 47 and 48: MB9B500 Series Precautions for Pac
Page 49 and 50: HANDLING DEVICES MB9B500 Series Po
Page 51 and 52: HANDLING MB9BF500 MB9B500 Series H
Page 53 and 54: MB9BF504/505/506 Block Diagram TRST
Page 55 and 56: MB9B500 Series Memory Map(2) 0x2008
Page 57 and 58: PIN STATUS IN EACH CPU STATE The te
Page 59 and 60: Pin status type Power-on reset or l
Page 61 and 62: Pin status type Function group Powe
Page 63 and 64: MB9B500 Series 2. Absolute Maximum
Page 65 and 66: DC Characteristics The following ta
Page 67 and 68: MB9B500 Series (2) MB9BF504/505/506
Page 69 and 70: MB9B500 Series 2. Pin Characteristi
Page 71 and 72: MB9B500 Series (2) Sub Clock Input
Page 73 and 74: MB9B500 Series (7) External Bus Tim
Page 75 and 76: MB9B500 Series ・ NAND FLASH mode
Page 77 and 78: (8) Base Timer Input Timing ・ Tim
Page 79: SCK SOT SIN SCK SOT SIN V IH tF DS7
Page 83 and 84: SCK SOT SIN SCK SOT SIN *2 VOH VO L
Page 85 and 86: SCK SOT SIN SCK SOT SIN VOH VOL MB9
Page 87 and 88: MB9B500 Series (11) Quadrature Posi
Page 89 and 90: MB9B500 Series (12) I 2 C timing (V
Page 91 and 92: MB9B500 Series (14) JTAG timing (Vc
Page 93 and 94: (Continued) MB9B500 Series The outp
Page 95 and 96: MB9B500 Series ・ Setting examples
Page 97 and 98: MB9B500 Series ・ Setting examples
Page 99 and 100: ・Definition of 10-bit A/D Convert
Page 101 and 102: 12bit A/D Converter This chapter sh
Page 103 and 104: ・Definition of 12-bit A/D Convert
Page 105 and 106: MB9B500 Series *3 : The output driv
Page 107 and 108: (Continued) Figure 1 Low-Speed Load
Page 109 and 110: Flash Memory Write/Erase Characteri
Page 111 and 112: Power supply current (Sub timer mod
Page 113 and 114: PACKAGE DIMENSIONS 100-pin plastic
Page 115 and 116: (Continued) 120-pin plastic LQFP (F
Page 117 and 118: MAJOR CHANGES IN THIS EDITION Page
Page 119 and 120: DS706-00010-1v0-E MB9B500 Series 11
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FM3 MB9B500 Series - Microcontrollers - Fujitsu

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