VLSI CAD Flow: Logic Synthesis, Placement and Routing 6.375 ...
VLSI CAD Flow: Logic Synthesis, Placement and Routing 6.375 ...
VLSI CAD Flow: Logic Synthesis, Placement and Routing 6.375 ...
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Comparison<br />
f = ab + ac+ ba+ bc + ca + cb<br />
Algebraic factorization procedures<br />
f = a( b + c ) + a ( b + c ) + bc + cb<br />
Boolean factorization produces<br />
f = ( a + b + c ) ( a + b + c )<br />
l = bf+ bf<br />
( ) a + e<br />
( )+ ae b f + bf<br />
( )<br />
r = ( bf+ b f ) ( a + e)+<br />
ae( b f + bf )<br />
Algebraic substitution of l into r fails<br />
Boolean substitution<br />
r = a( el + el ) + a( el + el )<br />
l = a( er + e r ) + a( er + er)<br />
10
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