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VLSI CAD Flow: Logic Synthesis, Placement and Routing 6.375 ...

VLSI CAD Flow: Logic Synthesis, Placement and Routing 6.375 ...

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Basic Rules of <strong>Routing</strong> - 1<br />

Photo courtesy:<br />

Jan M. Rabaey<br />

Anantha Ch<strong>and</strong>rakasan<br />

Borivoje Nikolic<br />

ECE 260B – CSE 241A /UCB EECS 244 6<br />

Wiring/routing<br />

performed in layers –<br />

5-9 (-11), typically<br />

only in “Manhattan”<br />

N/S E/W directions<br />

E.g. layer 1 – N/S<br />

Layer 2 – E/W<br />

A segment cannot<br />

cross another<br />

segment on the same<br />

wiring layer<br />

Wire segments can<br />

cross wires on other<br />

layers<br />

Power <strong>and</strong> ground<br />

may have their own<br />

layers<br />

Kahng/Keutzer/Newton

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