VLSI CAD Flow: Logic Synthesis, Placement and Routing 6.375 ...
VLSI CAD Flow: Logic Synthesis, Placement and Routing 6.375 ...
VLSI CAD Flow: Logic Synthesis, Placement and Routing 6.375 ...
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Weak Division Example<br />
f = abc + abde + abh + bcd<br />
g = c + de + h<br />
Theorem: f / g = f / c ∩ f / de ∩ f / h<br />
f / c = ab + bd<br />
f / de = ab<br />
f / h = ab<br />
f / g = (ab + bd) ∩ ab ∩ ab = ab<br />
f = ab(c + de + h) + bcd<br />
Time complexity: O( | f | | g | )<br />
15
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