A State-Based Programming Model for Wireless Sensor Networks

2.3. Sensor Nodes 19
chips in the system, assembly cost as well as size are cut with the reduction in
wiring overhead.
Sensor-node SOC developments are still in their early stages and have yet
to be tested in field experiments. Only very few prototypes exist today. The
integration level of sensor-nodes SOCs promise very-low power consumption,
and very small size. The single chip design could also facilitate the easy and
effective packaging. Examples of sensor-node SOCs are Smart Dust [68, 119,
120], the Spec Mote [60], and SNAP [39, 66].
2.3.2 Sensor-Node Components
Processors
Sensor node designs (both, COTS and SOC) typically feature a reprogrammable
low-power 8-bit RISC microcontroller as their main processor. Operating at
speeds of a few MIPS, it typically controls the sensors and actuators, monitors
system resources, such as the remaining battery power as well as running a custom
application. The microcontroller may also have to control a simplistic RF
radio, however, more sophisticated radio transceivers include their own embedded
processor for signal processing. Some applications depend on near real-time
signal processing or complex cryptographic operations. Since the computational
power of 8-bit microcontrollers is often too limited to perform such tasks, some
sensor nodes designs use 16 or even 32-bit microcontroller, or they include additional
ASICs, DSPs, or FPGAs.
However, more processing power only comes at a significant monetary price.
While today 8-bit microcontrollers are about 50 US cents in very high volume
(millions of parts), low-end 32-bit microcontrollers are already $ 5-7 US [103].
Pricing is particularly important for applications where the nodes are disposable
and/or are deployed in high volumes. Though is can be safely expected
that prices will decrease further driven by Moore’s Law (to as low as $ 1 US
for low-end 32-bit microcontrollers [33] in 2007), less powerful processor architectures
will always be cheaper because they require to integrate less gates (i.e.,
transistors).
Memories
Sensor nodes are typically based on microcontrollers, which typically have a
Harvard architecture, that is, they have separate memories for data and instructions.
Most modern microcontroller designs feature integrated data and instruction
memories, but do not have a memory management unit (MMU) and thus
cannot enforce memory protection. Some sensor-node designs add external data
memory or non-volatile memory, such as FLASH-ROM.
Microcontrollers used in COTS sensor nodes include between 8 and
512 Kbytes of non-volatile program memory (typically FLASH memory) and
up to 4 Kbytes of volatile SRAM. Some additionally provide up to 4 Kbytes of
non-volatile general-purpose memory, such as EEPROM. To perform memoryintensive
algorithms, some designs add external data memories. The address
bus of 8-bit microcontrollers is typically only 16-bit wide, allowing to address
only 64 Kbytes. Therefore the entire data memory (including heap, static data