H8SX/1665MZ Group Hardware Manual - Renesas Electronics

16.4.2 Reset Input........................................................................................................ 803
16.5 Operation Timing.............................................................................................................. 804
16.5.1 TCNT Count Timing ........................................................................................ 804
16.5.2 Timing of CMFA and CMFB Setting at Compare Match ................................ 805
16.5.3 Timing of Timer Output at Compare Match..................................................... 805
16.5.4 Timing of Counter Clear by Compare Match ................................................... 806
16.5.5 Timing of TCNT External Reset....................................................................... 806
16.5.6 Timing of Overflow Flag (OVF) Setting .......................................................... 807
16.6 Operation with Cascaded Connection............................................................................... 808
16.6.1 16-Bit Counter Mode........................................................................................ 808
16.6.2 Compare Match Count Mode............................................................................ 808
16.7 Interrupt Sources...............................................................................................................809
16.7.1 Interrupt Sources and DTC Activation ............................................................. 809
16.7.2 A/D Converter Activation................................................................................. 810
16.8 Usage Notes...................................................................................................................... 811
16.8.1 Notes on Setting Cycle ..................................................................................... 811
16.8.2 Conflict between TCNT Write and Counter Clear ........................................... 811
16.8.3 Conflict between TCNT Write and Increment.................................................. 812
16.8.4 Conflict between TCOR Write and Compare Match........................................ 812
16.8.5 Conflict between Compare Matches A and B................................................... 813
16.8.6 Switching of Internal Clocks and TCNT Operation ......................................... 813
16.8.7 Mode Setting with Cascaded Connection ......................................................... 815
16.8.8 Module Stop State Setting ................................................................................ 815
16.8.9 Interrupts in Module Stop State ........................................................................ 815
Section 17 32K Timer (TM32K).......................................................................817
17.1 Features............................................................................................................................. 817
17.2 Register Descriptions........................................................................................................ 818
17.2.1 Timer Control Register (TCR32K)................................................................... 818
17.2.2 Timer Counter (TCNT32K1, TCNT32K2, TCNT32K3).................................. 819
17.3 Operation .......................................................................................................................... 821
17.3.1 Basic Operation ................................................................................................ 821
17.3.2 EXCKSN=1 Operation ..................................................................................... 822
17.3.3 EXCKSN=0 Operation ..................................................................................... 822
17.4 Interrupt Source ................................................................................................................824
17.5 Usage Notes...................................................................................................................... 825
17.5.1 Changing Values of Bits EXCKSN, CKS1, and CKS0 .................................... 825
17.5.2 Note on Register Initialization.......................................................................... 825
17.5.3 Usage Notes on 32K Timer .............................................................................. 825
Rev. 1.00 Jan. 29, 2010 Page xxii of xxxii