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AD538 ABSOLUTE MAXIMUM RATINGS Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . 250 mW Output Short Circuit-to-Ground . . . . . . . . . . . . . . . Indefinite Input Voltages V X , V Y , V Z . . . . . . . . . . . . . (+V S – 1 V), –1 V Input Currents I X , I Y , I Z , I O . . . . . . . . . . . . . . . . . . . . . . 1 mA Operating Temperature Range . . . . . . . . . . . –25°C to +85°C Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature, Storage . . . . . . . . . . . . . . 60 sec, +300°C Thermal Resistance θ JC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35°C/W θ JA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W PIN CONFIGURATION I Z V Z 1 2 B 3 +10V 4 18 A 17 D 16 I X 15 V X +2V 5 TOP VIEW (Not to Scale) 14 SIGNAL GND +V S –V S 6 7 13 12 PWR GND C V O I AD538 8 11 I Y 9 10 V Y ORDERING GUIDE Temperature Package Package Model Range Description Option AD538AD –25°C to +85°C Side-Brazed Ceramic DIP D-18 AD538BD –25°C to +85°C Side-Brazed Ceramic DIP D-18 AD538ACHIPS –25°C to +85°C Chips AD538SD –55°C to +125°C Side-Brazed Ceramic DIP D-18 AD538SD/883B –55°C to +125°C Side-Brazed Ceramic DIP D-18 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD538 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE –4– REV. C
5.0 1000 Typical Performance Characteristics– AD538 1M TOTAL % OF READING ERROR 4.0 3.0 2.0 1.0 OFFSET 800 600 400 200 OUTPUT STAGE OFFSET – V SMALL SIGNAL BANDWITH – Hz 400k 100k 40k V Y = 10V dc V Z = V X +0.05 V X SIN t % OF READING 0 0 –55 –40 –20 0 20 40 60 80 100 125 TEMPERATURE – C 10k 0.01 0.1 1 10 DENOMINATOR VOLTAGE, V X – V dc Figure 1. Multiplier Error vs. Temperature (100 mV < V X , V Y , V Z ≤ 10 V) Figure 4. Small Signal Bandwidth vs. Denominator Voltage (One-Quadrant Mult/Div) 5.0 1000 6.0 1200 TOTAL % OF READING ERROR 4.0 3.0 2.0 1.0 OFFSET % OF READING 0 0 –55 –40 –20 0 20 40 60 80 100 125 TEMPERATURE – C Figure 2. Divider Error vs. Temperature (100 mV < V X , V Y , V Z ≤ 10 V) 800 600 400 200 OUTPUT STAGE OFFSET – V TOTAL % OF READING ERROR 5.0 4.0 3.0 2.0 1.0 % OF READING OFFSET 0 0 –55 –40 –20 0 20 40 60 80 100 125 TEMPERATURE – C Figure 5. Multiplier Error vs. Temperature (10 mV < V X , V Y , V Z ≤ 100 mV) 1000 800 600 400 200 OUTPUT STAGE OFFSET – V V O IN mV PEAK-TO-PEAK 1000 100 10 V X = 10V V Y = 0V V Z = 5V +5V SIN t VOLTS TOTAL % OF READING ERROR 5.0 4.0 3.0 2.0 1.0 % OF READING 1000 800 600 400 200 OUTPUT STAGE OFFSET – V 1 100 1k 10k 100k 1M INPUT FREQUENCY – Hz Figure 3. V Z Feedthrough vs. Frequency OFFSET 0 0 –55 –40 –20 0 20 40 60 80 100 125 TEMPERATURE – C Figure 6. Divider Error vs. Temperature (10 mV < V X , V Y , V Z ≤ 100 mV) REV. C –5–
Page 1 and 2: a FEATURES m ⎛ V Z ⎞ V OUT = V
Page 3: AD538 RE-EXAMINATION OF MULTIPLIER/
Page 7 and 8: AD538 STABILITY PRECAUTIONS At high
Page 9 and 10: AD538 ANALOG COMPUTATION OF POWERS
Page 11: AD538 OUTLINE DIMENSIONS Dimensions

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