Fan-in WLCSP matures, what's next? IMT on the role ... - I-Micronews

More documents

Recommendations

Info

(C2W or W2W) TSV Etch FEOL 1000 C FEOL 1000 C FEOL 1000 C BEOL 450 C TSV Fill TSV Etch BEOL 450 C FEOL 1000 C TSV Fill BEOL 450 C BEOL 450 C TSV Etch TSV Etch Th<strong>in</strong>n<strong>in</strong>g + Backside prep Handl<strong>in</strong>g carrier Th<strong>in</strong>n<strong>in</strong>g + Backside prep Handl<strong>in</strong>g carrier TSV Fill + Backside prep Handl<strong>in</strong>g carrier Handl<strong>in</strong>g carrier Handl<strong>in</strong>g carrier TSV Fill + Backside prep De-Bond<strong>in</strong>g De-Bond<strong>in</strong>g De-Bond<strong>in</strong>g F E B R U A R Y 2 0 1 0 i s s u e n ° 1 4 N e w s l e t t e r o n 3 D I C , T S V , W L P & E m b e d d e d T e c h n o l o g i e s two day <strong>in</strong>tertechpira conference plus expert pre-conference workshop Image Sensors Europe 2010 Focus on digital imag<strong>in</strong>g 23 – 25 March 2010 Copthorne Tara Hotel, London, UK www.image-sensors.com Image Sensors Europe (ISE) is the lead<strong>in</strong>g <strong>in</strong>dustry event where the leaders of the image sensors world convene to meet new customers, suppliers and partners each year. ISE 2010 attendees will... » See where the image sensors market is head<strong>in</strong>g » Get to grips with the latest technical advances » Improve speed and efficiency of configuration » Learn about new niche markets and opportunities » Hear the latest on future applications such as gesture control » Network with the lead<strong>in</strong>g players <strong>in</strong> the European market » Experience the whole conference on a state-of-the-art AV system » Be a part of THE <strong>in</strong>dustrial forum for image sensors <strong>in</strong> Europe! Book onl<strong>in</strong>e at www.image-sensors.com or call us on +44 (0) 1372 802164 Featur<strong>in</strong>g over 30 presentations from: Alacron / Panavision • Apt<strong>in</strong>a • Awaiba BBC Research • Chipworks • CMOSIS • CSEM DALSA • DXO Labs • FormFactor Heidelbery University • Imatest InVision Technologies • Micazook • RICAtek Ltd Sony • Silicon Hive • ST Microelectronics Tessera • University of Sheffield ...plus many others! 3D-IC & TSV Interconnects 2010 Reports MaRKEt tREnDs One report update mak<strong>in</strong>g the bus<strong>in</strong>ess case for 3D IC Packag<strong>in</strong>g One new report to understand 3D TSV via process options We have identified as of today more than 15 different 300mm 3-D IC pilot l<strong>in</strong>es runn<strong>in</strong>g or currently be<strong>in</strong>g <strong>in</strong>stalled world-wide (with<strong>in</strong> R&D centers, at packag<strong>in</strong>g houses, cMos foundries or with<strong>in</strong> IDM fabs). Via First Vias are made before CMOS 3D TSV via <strong>in</strong>tegration MAIN scenarios Step #1 Step #2 Step #3 Step #4 Step #5 Step #6 KEY FEatuREs • Revamped market forecasts & technology roadmaps for 3D IC components: impact of the economic downturn on the 3D tsV market - market forecast update for MEMs, cMos image sensors …- new application areas covered: HB-LED modules, power and solar components - bus<strong>in</strong>ess case for 3D <strong>in</strong>terposers: applications, market and players. • 3D IC players 2008 market shares & revenues breakdown <strong>in</strong> $M (as packag<strong>in</strong>g services or estimated <strong>in</strong> relative packag<strong>in</strong>g value) • Supply cha<strong>in</strong> perspectives, key players and emerg<strong>in</strong>g <strong>in</strong>frastructure for 3D Packag<strong>in</strong>g • Strategic technology choices for 3D <strong>in</strong>tegration scenarios: analysis of the different possibility for the implementation of tsVs and the rationale beh<strong>in</strong>d – analysis of the cost structure for different implementation cases contact us For more <strong>in</strong>formation, feel free to contact David Jourdan: tel: +33 472 83 01 90, Email: jourdan@yole.fr Via Middle Vias are made between CMOS and BEOL Via Last Vias are made after BEOL Via After Bond<strong>in</strong>g Vias are made after Bond<strong>in</strong>g “Via-Last” TSV DRAM DRAM DRAM IPD Digital DSP <strong>in</strong>terposer + PCB / lam<strong>in</strong>ated substrate Th<strong>in</strong>n<strong>in</strong>g Bond<strong>in</strong>g Th<strong>in</strong>n<strong>in</strong>g 3D TSV Silicon <strong>in</strong>terposer Concept “Via-First” TSV “Integrated passive” Decoupl<strong>in</strong>g Capacitors, Inductors… eRAMe eFLASHH eRAM Y O L E D É V E L OeRAM P P E M E N T SRAM Logic Multi-cores BAW / SAW filters Integrated passive Y O L E D É V E L O P P E M E N T Y O L E D É V E L O P P E M E N T 12
F E B R U A R Y 2 0 1 0 i s s u e n ° 1 4 N e w s l e t t e r o n 3 D I C , T S V , W L P & E m b e d d e d T e c h n o l o g i e s C O M P A N Y V I S I O N OmniBSI: the third approach to Backside Illum<strong>in</strong>ated (BSI) Sensor Integration In summary, BSI technology for small pixel CMOS image sensors (CIS) enables <strong>in</strong>creased fill factor and quantum efficiency, reduced pixel cross talk, and th<strong>in</strong>ner camera modules. Image sensor technologists migrat<strong>in</strong>g to a BSI configuration have many new (for them) eng<strong>in</strong>eer<strong>in</strong>g problems to solve. The choices of start<strong>in</strong>g substrate (bulk vs. SOI), carrier wafer bond, substrate thickness, surface passivation, and pixel isolation can <strong>in</strong>fluence both the sensor’s manufactur<strong>in</strong>g cost and performance. Once the BSI sensor’s desired performance is set at the silicon level, it still needs to be <strong>in</strong>tegrated <strong>in</strong>to the camera module supply cha<strong>in</strong>. To achieve this <strong>in</strong>tegration, companies need to choose a course for packag<strong>in</strong>g, whether it be through licens<strong>in</strong>g or <strong>in</strong>novation. Mak<strong>in</strong>g this decision is not optional; the reality of a th<strong>in</strong> substrate BSI sensor forces an eng<strong>in</strong>eer<strong>in</strong>g response. metallization to the edge <strong>in</strong> front illum<strong>in</strong>ated sensors was easily transferrable to the BSI solution. By go<strong>in</strong>g horizontal first, and then connect<strong>in</strong>g the traces with a sidewall redistribution layer, a flip of the image sensor substrate had m<strong>in</strong>imal impact on the new packag<strong>in</strong>g. Despite the radical reeng<strong>in</strong>eer<strong>in</strong>g of the now 2.1 µm thick CIS substrate, OmniVision/TSMC were able to avoid Three avenues exist for BSI sensor <strong>in</strong>tegration: wafer level chip scale packag<strong>in</strong>g (WL-CSP) both with and without through silicon vias (TSVs), and backside wire bond<strong>in</strong>g. Be<strong>in</strong>g early adopters of WL-CSP packag<strong>in</strong>g for their front illum<strong>in</strong>ated sensors, OmniVision and foundry partner TSMC were fortuitously able to recycle their exist<strong>in</strong>g solution for their bulk BSI process. A quick review of OmniVision’s advanced packag<strong>in</strong>g roadmap beg<strong>in</strong>s with its 2003 <strong>in</strong>vestment <strong>in</strong> Taiwanese wafer level packag<strong>in</strong>g (WLP) company X<strong>in</strong>tec Inc. TSMC has also been a longtime <strong>in</strong>vestor <strong>in</strong> X<strong>in</strong>tec, f<strong>in</strong>ally tak<strong>in</strong>g a controll<strong>in</strong>g share <strong>in</strong> 2007. X<strong>in</strong>tec licensed Shellcase/Tessera’s ShellOP WLP technology <strong>in</strong> 2002, mak<strong>in</strong>g it an attractive partner for OmniVision/TSMC. Chipworks found this <strong>in</strong> use <strong>in</strong> 2007, <strong>in</strong> an OmniVision 2 Mp front illum<strong>in</strong>ated camera module. The sensor had a thickness of 700 µm, as measured from the top of Glass 1 to the bottom of Glass 2. Figure 1 X<strong>in</strong>tec WL-CSP for BSI – Cross Section Overview OmniVision chose to <strong>in</strong>sert its BSI technology at the 1.4 µm pixel generation. After hav<strong>in</strong>g codeveloped the process flow with TSMC, mass production began <strong>in</strong> early 2009, with X<strong>in</strong>tec cont<strong>in</strong>u<strong>in</strong>g to handle the packag<strong>in</strong>g. Chipworks analyzed a 5 Mp OmniBSI CIS (OV5642), a cross section of which is shown <strong>in</strong> Figure 1. At a glance, the cross section could be mistaken for a front illum<strong>in</strong>ated sensor. Closer <strong>in</strong>spection reveals the ultrath<strong>in</strong> BSI sensor substrate bonded to a silicon carrier wafer, and the absence of a lower glass support. X<strong>in</strong>tec’s WL-CSP BSI version is only 570 µm thick, a thickness reduction of about 0.13 mm compared to the front illum<strong>in</strong>ated device. Figure 2 shows a detailed view of the “T” contact modified for use <strong>in</strong> the BSI configuration. As it turns out, the philosophy of extend<strong>in</strong>g the die Figure 2 X<strong>in</strong>tec WL-CSP for BSI – Cross Section Detail 13
Page 1 and 2: M a g a z i n e o n 3 D - I C , T S
Page 3 and 4: F E B R U A R Y 2 0 1 0 i s s u e n
Page 11: F E B R U A R Y 2 0 1 0 i s s u e n

Fan-in WLCSP matures, what's next? IMT on the role ... - I-Micronews

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?